amdfwtool: Correct the PSP2 directory layout
PSP2 is for Combo BIOS, which is the idea that one image supports 2 kinds of APU. The PSP2 feature is for the future, not for current products. The newest document about PSP2 is not available. I made it from the draft code I made when I was in AMD. Change-Id: I65328db197c02ee67f3e99faf4ab8acabd339657 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/12474 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -22,7 +22,7 @@
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* +------------+---------------+
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* +------------+---------------+
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* EC ROM should be 64K aligned.
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* EC ROM should be 64K aligned.
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*
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*
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* PSP directory
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* PSP directory (Where "PSPDIR ADDR" points)
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* +------------+---------------+----------------+------------+
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* +------------+---------------+----------------+------------+
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* | 'PSP$' | Fletcher | Count | Reserved |
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* | 'PSP$' | Fletcher | Count | Reserved |
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* +------------+---------------+----------------+------------+
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* +------------+---------------+----------------+------------+
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@ -40,9 +40,22 @@
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* | |
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* | |
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* | |
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* | |
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* +------------+---------------+----------------+------------+
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* +------------+---------------+----------------+------------+
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*
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* PSP2 directory
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* +------------+---------------+----------------+------------+
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* | 'PSP2' | Fletcher | Count | Reserved |
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* +------------+---------------+----------------+------------+
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* | 1 | PSP ID | PSPDIR ADDR | | 2nd PSP directory
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* +------------+---------------+----------------+------------+
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* | 2 | PSP ID | PSPDIR ADDR | | 3rd PSP directory
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* +------------+---------------+----------------+------------+
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* | |
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* | Other PSP |
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* | |
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* +------------+---------------+----------------+------------+
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*
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*/
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*/
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#include <fcntl.h>
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#include <fcntl.h>
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#include <errno.h>
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#include <errno.h>
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#include <stdio.h>
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#include <stdio.h>
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@ -194,7 +207,7 @@ amd_fw_entry amd_fw_table[] = {
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void fill_psp_head(uint32_t *pspdir, int count)
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void fill_psp_head(uint32_t *pspdir, int count)
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{
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{
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pspdir[0] = 1347637284; /* 'PSP$' */
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pspdir[0] = 0x50535024; /* 'PSP$' */
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pspdir[2] = count; /* size */
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pspdir[2] = count; /* size */
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pspdir[3] = 0;
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pspdir[3] = 0;
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pspdir[1] = fletcher32((uint16_t *)&pspdir[1], (count *16 + 16)/2 - 2);
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pspdir[1] = fletcher32((uint16_t *)&pspdir[1], (count *16 + 16)/2 - 2);
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@ -345,6 +358,8 @@ int main(int argc, char **argv)
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int c, count, pspflag = 0;
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int c, count, pspflag = 0;
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#if PSP2
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#if PSP2
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int psp2flag = 0;
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int psp2flag = 0;
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int psp2count;
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uint32_t *psp2dir;
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#endif
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#endif
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void *rom = NULL;
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void *rom = NULL;
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uint32_t current;
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uint32_t current;
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@ -511,16 +526,32 @@ int main(int argc, char **argv)
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#if PSP2
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#if PSP2
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if (psp2flag == 1) {
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if (psp2flag == 1) {
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current = ALIGN(current, 0x10000);
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current = ALIGN(current, 0x10000); /* PSP2 dir */
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pspdir = rom + current;
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psp2dir = rom + current;
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amd_romsig[5] = current + ROM_BASE_ADDRESS;
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amd_romsig[5] = current + ROM_BASE_ADDRESS;
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current += 0x200; /* Conservative size of pspdir */
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current += 0x100; /* Add conservative size of psp2dir. */
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/* TODO: remove the hardcode. */
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psp2count = 1; /* Start from 1. */
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/* for (; psp2count <= PSP2COUNT; psp2count++, current=ALIGN(current, 0x100)) { */
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psp2dir[psp2count*4 + 0] = psp2count; /* PSP Number */
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psp2dir[psp2count*4 + 1] = 0x10220B00; /* TODO: PSP ID. Documentation is needed. */
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psp2dir[psp2count*4 + 2] = current + ROM_BASE_ADDRESS;
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pspdir = rom + current;
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psp2dir[psp2count*4 + 3] = 0;
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current += 0x200; /* Add conservative size of pspdir. Start of PSP entries. */
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for (count = 0; count < sizeof(amd_psp2_fw_table) / sizeof(amd_fw_entry); count ++) {
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for (count = 0; count < sizeof(amd_psp2_fw_table) / sizeof(amd_fw_entry); count ++) {
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current = integerate_one_psp(rom, current, pspdir, count);
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current = integerate_one_psp(rom, current, pspdir, count);
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}
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}
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fill_psp_head(pspdir, count);
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fill_psp_head(pspdir, count);
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/* } */ /* End of loop */
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/* fill the PSP2 head */
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psp2dir[0] = 0x50535032; /* 'PSP2' */
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psp2dir[2] = psp2count; /* Count */
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psp2dir[3] = 0;
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psp2dir[1] = fletcher32((uint16_t *)&psp2dir[1], (psp2count*16 + 16)/2 - 2);
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}
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}
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#endif
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#endif
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}
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}
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