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soc/amd/cezanne/chipset.cb: add missing ops for GPP GFX bridges 

Commit b171f76812 ("soc/amd/*: Hook up GPP bridges ops to devicetree")
missed adding the amd_external_pcie_gpp_ops ops to the gpp_gfx_bridge
PCIe ports, so add them. Those devices were previously covered by the
PCI_DID_AMD_FAM17H_MODEL60H_PCIE_GPP_D1 PCI device ID in the list that
got removed in the referenced commit.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I55434bf486569b32901b3840193a09cc5955abb2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72735
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Felix Held 2023-02-03 01:24:53 +01:00
parent 7c66d39a0b
commit 5167c45d05
1 changed files with 3 additions and 3 deletions
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6
src/soc/amd/cezanne/chipset.cb
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@ -8,9 +8,9 @@ chip soc/amd/cezanne
device pci 00.2 alias iommu off ops amd_iommu_ops end
device pci 01.0 on end # Dummy Host Bridge, do not disable
device pci 01.1 alias gpp_gfx_bridge_0 off end
device pci 01.2 alias gpp_gfx_bridge_1 off end
device pci 01.3 alias gpp_gfx_bridge_2 off end
device pci 01.1 alias gpp_gfx_bridge_0 off ops amd_external_pcie_gpp_ops end
device pci 01.2 alias gpp_gfx_bridge_1 off ops amd_external_pcie_gpp_ops end
device pci 01.3 alias gpp_gfx_bridge_2 off ops amd_external_pcie_gpp_ops end
device pci 02.0 on end # Dummy Host Bridge, do not disable
device pci 02.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end