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mb/google/hatch: update SD card detect GPIO 

SD_CD# in Cannonlake PCH is also wired to an internal virtual GPIO,
expose that GPIO for kernel to configure card detect IRQ.

BUG=b:123350329

Change-Id: I566cc2eb11dc257366897a1efba905b8ddcf493d
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/31553
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Rizwan Qureshi 2019-02-21 15:18:54 +05:30 committed by Patrick Georgi
parent ce529b6318
commit 51749b2766
2 changed files with 3 additions and 1 deletions
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2
src/mainboard/google/hatch/variants/baseboard/devicetree.cb
View File

@ -89,7 +89,7 @@ chip soc/intel/cannonlake
register "PcieClkSrcClkReq[1]" = "1"
# GPIO for SD card detect
register "sdcard_cd_gpio" = "GPP_G5"
register "sdcard_cd_gpio" = "vSD3_CD_B"
# PCIe port 14 for M.2 E-key WLAN
register "PcieRpEnable[13]" = "1"

2
src/mainboard/google/hatch/variants/baseboard/gpio.c
View File

@ -178,6 +178,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_H10, NONE),
/* PCH_I2C_TRACKPAD_SCL */
PAD_NC(GPP_H11, NONE),
/* SD card detect VGPIO */
PAD_CFG_GPI_GPIO_DRIVER(vSD3_CD_B, NONE, DEEP),
/* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_OD */
PAD_CFG_NF(GPD2, NONE, DEEP, NF1),