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soc/intel/{skl,cnl}: add NMI_{EN,STS} registers 

Add NMI_EN and NMI_STS registers, so they can be configured for using
NMI gpios.

References:
- CMP-LP: Intel doc# 615146-1.2
- CMP-H:  Intel doc# 620855-002
- SPT-H:  Intel doc# 332691-003
- SPT-LP: Intel doc# 334659-005
- CNP-H:  Intel doc# 337868-002

Test: trigger NMI via gpio on Supermicro X11SSM-F did not work before
but now makes the Linux kernel complain about a NMI.

Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I4d57ae89423bdaacf84f0bb0282bbb1c9df94598
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48091
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2020-11-23 22:05:36 +01:00
parent 14512f9a9b
commit 51f5ff6d27
6 changed files with 34 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/soc/intel/cannonlake/gpio.c
View File

@ -76,6 +76,8 @@ static const struct pad_community cnl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_ABG",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -96,6 +98,8 @@ static const struct pad_community cnl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_DFH",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -116,6 +120,8 @@ static const struct pad_community cnl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPD",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -136,6 +142,8 @@ static const struct pad_community cnl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GP_AC",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -156,6 +164,8 @@ static const struct pad_community cnl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_CEJ",
.acpi_path = "\\_SB.PCI0.GPIO",

10
src/soc/intel/cannonlake/gpio_cnp_h.c
View File

@ -78,6 +78,8 @@ static const struct pad_community cnl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_AB",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -98,6 +100,8 @@ static const struct pad_community cnl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_CDG",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -118,6 +122,8 @@ static const struct pad_community cnl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPD",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -138,6 +144,8 @@ static const struct pad_community cnl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_KHEF",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -158,6 +166,8 @@ static const struct pad_community cnl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_IJ",
.acpi_path = "\\_SB.PCI0.GPIO",

2
src/soc/intel/cannonlake/include/soc/gpio_defs.h
View File

@ -236,6 +236,8 @@
#define GPI_INT_EN_0 0x120
#define GPI_SMI_STS_0 0x180
#define GPI_SMI_EN_0 0x1A0
#define GPI_NMI_STS_0 0x1c0
#define GPI_NMI_EN_0 0x1e0
#define PAD_CFG_BASE 0x600
#endif

2
src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h
View File

@ -310,6 +310,8 @@
#define GPI_INT_EN_0 0x120
#define GPI_SMI_STS_0 0x180
#define GPI_SMI_EN_0 0x1A0
#define GPI_NMI_STS_0 0x1c0
#define GPI_NMI_EN_0 0x1e0
#define PAD_CFG_BASE 0x600
#endif

8
src/soc/intel/skylake/gpio.c
View File

@ -62,6 +62,8 @@ static const struct pad_community skl_gpio_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_COM0",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -84,6 +86,8 @@ static const struct pad_community skl_gpio_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_COM1",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -107,6 +111,8 @@ static const struct pad_community skl_gpio_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_COM3",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -125,6 +131,8 @@ static const struct pad_community skl_gpio_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_COM2",
.acpi_path = "\\_SB.PCI0.GPIO",

2
src/soc/intel/skylake/include/soc/gpio_defs.h
View File

@ -216,5 +216,7 @@
#define GPI_INT_EN_0 0x120
#define GPI_SMI_STS_0 0x180
#define GPI_SMI_EN_0 0x1a0
#define GPI_NMI_STS_0 0x1c0
#define GPI_NMI_EN_0 0x1e0
#endif /* _SOC_GPIO_DEFS_H_ */