intel/lynxpoint: Allow building without IFD (descripter.bin)

On newer Intel systems, like Intel Lynx Point, the flash ROM is shared
between the host processor (BIOS), its Management Engine (ME) and an
integrated Ethernet controller (GbE). The layout of the flash ROM (and
other information) is kept in the so called Intel Firmware Descriptor
(IFD).  If we only want to build coreboot to update the BIOS section,
all we need is the flash layout.

So add the option to specify the flash layout in the mainboard’s
Kconfig, and thus, to build without the real IFD. However, with such a
build, one has to make sure that the IFD section on the flash ROM will
not be written over (nor any other section that has not been included
by coreboot). A patch to write selected sections of a flash ROM with
IFD has been sent to the flashrom mailing list [2].

The same was done in commit a15cd66b [1] (sandybridge: Make build
possible without descriptor.bin) for Intel Sandy Bridge (BD82x6x).

[1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html
    [PATCH] Add option to read ROM layout from IFD
[2] http://review.coreboot.org/3524

Change-Id: I26a604446cdf37a6bbcee2b14a107b7ccf417d5c
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/6046
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Paul Menzel 2014-06-16 09:28:36 +02:00 committed by Patrick Georgi
parent 6a089e3b18
commit 5218e61651
2 changed files with 67 additions and 3 deletions

View File

@ -54,6 +54,52 @@ config SERIRQ_CONTINUOUS_MODE
If you set this option to y, the serial IRQ machine will be If you set this option to y, the serial IRQ machine will be
operated in continuous mode. operated in continuous mode.
config HAVE_IFD_BIN
bool
default y
config BUILD_WITH_FAKE_IFD
bool "Build with a fake IFD"
default y if !HAVE_IFD_BIN
help
If you don't have an Intel Firmware Descriptor (ifd.bin) for your
board, you can select this option and coreboot will build without it.
Though, the resulting coreboot.rom will not contain all parts required
to get coreboot running on your board. You can however write only the
BIOS section to your board's flash ROM and keep the other sections
untouched. Unfortunately the current version of flashrom doesn't
support this yet. But there is a patch pending [1].
WARNING: Never write a complete coreboot.rom to your flash ROM if it
was built with a fake IFD. It just won't work.
[1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html
config IFD_BIOS_SECTION
depends on BUILD_WITH_FAKE_IFD
string
default ""
config IFD_ME_SECTION
depends on BUILD_WITH_FAKE_IFD
string
default ""
config IFD_GBE_SECTION
depends on BUILD_WITH_FAKE_IFD
string
default ""
config IFD_PLATFORM_SECTION
depends on BUILD_WITH_FAKE_IFD
string
default ""
config IFD_BIN_PATH
string "Path to intel firmware descriptor"
depends on !BUILD_WITH_FAKE_IFD
default "3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin"
config ME_BIN_PATH config ME_BIN_PATH
string "Path to management engine firmware" string "Path to management engine firmware"
default "3rdparty/mainboard/$(MAINBOARDDIR)/me.bin" default "3rdparty/mainboard/$(MAINBOARDDIR)/me.bin"

View File

@ -63,9 +63,27 @@ ramstage-y += gpio.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += gpio.c smm-$(CONFIG_HAVE_SMI_HANDLER) += gpio.c
endif endif
lynxpoint_add_me: $(obj)/coreboot.pre $(IFDTOOL) ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
IFD_BIN_PATH := $(objgenerated)/ifdfake.bin
IFD_SECTIONS := $(addprefix -b ,$(CONFIG_IFD_BIOS_SECTION:"%"=%)) \
$(addprefix -m ,$(CONFIG_IFD_ME_SECTION:"%"=%)) \
$(addprefix -g ,$(CONFIG_IFD_GBE_SECTION:"%"=%)) \
$(addprefix -p ,$(CONFIG_IFD_PLATFORM_SECTION:"%"=%))
else
IFD_BIN_PATH := $(CONFIG_IFD_BIN_PATH)
endif
lynxpoint_add_me: $(obj)/coreboot.pre $(IFDTOOL) $(IFDFAKE)
ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
printf "\n** WARNING **\n"
printf "Coreboot will be built with a fake Intel Firmware Descriptor (IFD).\n"
printf "Never write a complete coreboot.rom with a fake IFD to your board's\n"
printf "flash ROM! Make sure that you only write valid flash regions.\n\n"
printf " IFDFAKE Building a fake Intel Firmware Descriptor\n"
$(IFDFAKE) $(IFD_SECTIONS) $(IFD_BIN_PATH)
endif
printf " DD Adding Intel Firmware Descriptor\n" printf " DD Adding Intel Firmware Descriptor\n"
dd if=$(CONFIG_IFD_BIN_PATH) \ dd if=$(IFD_BIN_PATH) \
of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
printf " IFDTOOL me.bin -> coreboot.pre\n" printf " IFDTOOL me.bin -> coreboot.pre\n"
$(objutil)/ifdtool/ifdtool \ $(objutil)/ifdtool/ifdtool \
@ -76,7 +94,7 @@ ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y)
printf " IFDTOOL Locking Management Engine\n" printf " IFDTOOL Locking Management Engine\n"
$(objutil)/ifdtool/ifdtool -l $(obj)/coreboot.pre $(objutil)/ifdtool/ifdtool -l $(obj)/coreboot.pre
mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
else else ifneq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
printf " IFDTOOL Unlocking Management Engine\n" printf " IFDTOOL Unlocking Management Engine\n"
$(objutil)/ifdtool/ifdtool -u $(obj)/coreboot.pre $(objutil)/ifdtool/ifdtool -u $(obj)/coreboot.pre
mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre