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mb/lenovo/[xtz]60: Introduce and use RCBA64 macro 

Change-Id: I85ca631dfb01acb92dd1ac38dff07215114cab8c
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30802
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Peter Lemenkov 2019-01-10 12:19:01 +01:00 committed by Patrick Georgi
parent e23245517b
commit 522a1b526b
4 changed files with 7 additions and 12 deletions
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6
src/mainboard/lenovo/t60/romstage.c
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@ -100,12 +100,10 @@ static void rcba_config(void)
RCBA32(FD) |= FD_INTLAN; RCBA32(FD) |= FD_INTLAN;
/* Set up I/O Trap #0 for 0xfe00 (SMIC) */ /* Set up I/O Trap #0 for 0xfe00 (SMIC) */
RCBA32(IOTR0) = 0x0000fe01; RCBA64(IOTR0) = 0x000200010000fe01ULL;
RCBA32(IOTR0+4) = 0x00020001;
/* Set up I/O Trap #3 for 0x800-0x80c (Trap) */ /* Set up I/O Trap #3 for 0x800-0x80c (Trap) */
RCBA32(IOTR3) = 0x000c0801; RCBA64(IOTR3) = 0x000200f0000c0801ULL;
RCBA32(IOTR3+4) = 0x000200f0;
} }
static void early_ich7_init(void) static void early_ich7_init(void)

6
src/mainboard/lenovo/x60/romstage.c
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@ -99,12 +99,10 @@ static void rcba_config(void)
RCBA32(FD) |= FD_INTLAN; RCBA32(FD) |= FD_INTLAN;
/* Set up I/O Trap #0 for 0xfe00 (SMIC) */ /* Set up I/O Trap #0 for 0xfe00 (SMIC) */
RCBA32(IOTR0) = 0x0000fe01; RCBA64(IOTR0) = 0x000200010000fe01ULL;
RCBA32(IOTR0+4) = 0x00020001;
/* Set up I/O Trap #3 for 0x800-0x80c (Trap) */ /* Set up I/O Trap #3 for 0x800-0x80c (Trap) */
RCBA32(IOTR3) = 0x000c0801; RCBA64(IOTR3) = 0x000200f0000c0801ULL;
RCBA32(IOTR3+4) = 0x000200f0;
} }
static void early_ich7_init(void) static void early_ich7_init(void)

6
src/mainboard/lenovo/z61t/romstage.c
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@ -100,12 +100,10 @@ static void rcba_config(void)
RCBA32(FD) |= FD_INTLAN; RCBA32(FD) |= FD_INTLAN;
/* Set up I/O Trap #0 for 0xfe00 (SMIC) */ /* Set up I/O Trap #0 for 0xfe00 (SMIC) */
RCBA32(IOTR0) = 0x0000fe01; RCBA64(IOTR0) = 0x000200010000fe01ULL;
RCBA32(IOTR0+4) = 0x00020001;
/* Set up I/O Trap #3 for 0x800-0x80c (Trap) */ /* Set up I/O Trap #3 for 0x800-0x80c (Trap) */
RCBA32(IOTR3) = 0x000c0801; RCBA64(IOTR3) = 0x000200f0000c0801ULL;
RCBA32(IOTR3+4) = 0x000200f0;
} }
static void early_ich7_init(void) static void early_ich7_init(void)

1
src/southbridge/intel/common/rcba.h
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@ -28,6 +28,7 @@
#define RCBA8(x) (*((volatile u8 *)(DEFAULT_RCBA + x))) #define RCBA8(x) (*((volatile u8 *)(DEFAULT_RCBA + x)))
#define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + x))) #define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + x)))
#define RCBA32(x) (*((volatile u32 *)(DEFAULT_RCBA + x))) #define RCBA32(x) (*((volatile u32 *)(DEFAULT_RCBA + x)))
#define RCBA64(x) (*((volatile u64 *)(DEFAULT_RCBA + x)))
#define RCBA_AND_OR(bits, x, and, or) \ #define RCBA_AND_OR(bits, x, and, or) \
(RCBA##bits(x) = ((RCBA##bits(x) & (and)) | (or))) (RCBA##bits(x) = ((RCBA##bits(x) & (and)) | (or)))