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Convert more boards to use mptable_write_buses. 

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6106 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2010-11-21 14:41:07 +00:00 committed by Patrick Georgi
parent 8cda9699d4
commit 5244e1ba63
69 changed files with 103 additions and 688 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
src/mainboard/arima/hdama/mptable.c
View File

@ -111,8 +111,7 @@ static unsigned max_apicid(void)
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
@ -146,44 +145,32 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_chain_0);
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
if (dev) {
bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_chain_0);
bus_8131_1 = 2;
}
/* 8131-2 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_chain_0);
bus_8131_2 = 3;
}
}
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);

12
src/mainboard/broadcom/blast/get_bus_conf.c
View File

@ -13,7 +13,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa = 10;
unsigned char bus_bcm5780[7];
unsigned char bus_bcm5785_0 = 1;
unsigned char bus_bcm5785_1 = 8;
@ -83,11 +82,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_bcm5785_1, PCI_DEVFN(0x0d,0));
if(dev) {
bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
}
else {
@ -99,12 +93,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_bcm5780[0], PCI_DEVFN(sbdn2 + i - 1,0));
if(dev) {
bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_bcm5780[i]);

1
src/mainboard/broadcom/blast/irq_tables.c
View File

@ -32,7 +32,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
extern unsigned char bus_isa;
extern unsigned char bus_bcm5780[7];
extern unsigned char bus_bcm5785_0;
extern unsigned char bus_bcm5785_1;

11
src/mainboard/broadcom/blast/mptable.c
View File

@ -9,7 +9,6 @@
#endif
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_bcm5780[7];
extern unsigned char bus_bcm5785_0;
extern unsigned char bus_bcm5785_1;
@ -21,8 +20,7 @@ extern unsigned sbdn2;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
int i;
int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -32,12 +30,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{

21
src/mainboard/dell/s1850/mptable.c
View File

@ -8,8 +8,7 @@
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_pxhd_1;
unsigned char bus_pxhd_2;
unsigned char bus_pxhd_3;
@ -29,35 +28,27 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
if (dev) {
bus_ich5r_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
bus_ich5r_1 = 7;
bus_isa = 8;
}
/* pxhd-1 */
dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
if (dev) {
bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.0, using defaults\n");
bus_pxhd_1 = 2;
}
/* pxhd-2 */
dev = dev_find_slot(1, PCI_DEVFN(0x00,2));
if (dev) {
bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.2, using defaults\n");
bus_pxhd_2 = 3;
}
@ -65,32 +56,24 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x4,0));
if (dev) {
bus_pxhd_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 0:04.0, using defaults\n");
bus_pxhd_3 = 5;
}
/* pxhd-4 */
dev = dev_find_slot(0, PCI_DEVFN(0x06,0));
if (dev) {
bus_pxhd_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 0:06.0, using defaults\n");
bus_pxhd_4 = 6;
}
}
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */

14
src/mainboard/getac/p470/mptable.c
View File

@ -30,8 +30,7 @@
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int i;
int max_pci_bus, isa_bus;
int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -39,16 +38,7 @@ static void *smp_write_config_table(void *v)
smp_write_processors(mc);
max_pci_bus = 5; // XXX read me from bridges.
/* ISA bus follows */
isa_bus = max_pci_bus + 1;
/* Bus: Bus ID Type */
for (i=0; i <= max_pci_bus; i++)
smp_write_bus(mc, i, "PCI ");
smp_write_bus(mc, isa_bus, "ISA ");
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);

22
src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c
View File

@ -36,7 +36,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa;
unsigned char bus_sis966[8]; //1
unsigned apicid_sis966;
@ -64,9 +63,6 @@ unsigned hcdnx[] =
// 0x20202020,
// 0x20202020,
};
unsigned bus_type[256];
static unsigned get_bus_conf_done = 0;
@ -77,7 +73,7 @@ void get_bus_conf(void)
unsigned sbdn;
device_t dev;
int i, j;
int i;
if(get_bus_conf_done==1) return; //do it only once
@ -98,23 +94,14 @@ void get_bus_conf(void)
bus_sis966[i] = 0;
}
for(i=0;i<256; i++) {
bus_type[i] = 0;
}
bus_type[0] = 1; //pci
bus_sis966[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_type[bus_sis966[0]] = 1;
/* SIS966 */
dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn + 0x06,0));
if (dev) {
bus_sis966[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_sis966[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_sis966[2]++;
for(j=bus_sis966[1];j<bus_sis966[2]; j++) bus_type[j] = 1;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
@ -127,14 +114,7 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
if (dev) {
bus_sis966[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for(j=bus_sis966[i];j<bus_isa; j++) bus_type[j] = 1;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_sis966[0], sbdn + 0x0a + i - 2 );
bus_isa = bus_sis966[i-1]+1;
}
}

3
src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c
View File

@ -52,11 +52,8 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern unsigned char bus_isa;
extern unsigned char bus_sis966[8]; //1
unsigned long write_pirq_routing_table(unsigned long addr)
{

13
src/mainboard/gigabyte/ga_2761gxdk/mptable.c
View File

@ -28,18 +28,15 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_sis966[8]; //1
extern unsigned apicid_sis966;
extern unsigned bus_type[256];
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned sbdn;
int i,j;
int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -50,13 +47,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
sbdn = sysconf.sbdn;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(j= 0; j < 256 ; j++) {
if(bus_type[j])
smp_write_bus(mc, j, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{

22
src/mainboard/gigabyte/m57sli/get_bus_conf.c
View File

@ -34,7 +34,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
@ -62,9 +61,6 @@ unsigned hcdnx[] =
// 0x20202020,
// 0x20202020,
};
unsigned bus_type[256];
static unsigned get_bus_conf_done = 0;
@ -75,7 +71,7 @@ void get_bus_conf(void)
unsigned sbdn;
device_t dev;
int i, j;
int i;
if(get_bus_conf_done==1) return; //do it only once
@ -96,23 +92,14 @@ void get_bus_conf(void)
bus_mcp55[i] = 0;
}
for(i=0;i<256; i++) {
bus_type[i] = 0;
}
bus_type[0] = 1; //pci
bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_type[bus_mcp55[0]] = 1;
/* MCP55 */
dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06,0));
if (dev) {
bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_mcp55[2]++;
for(j=bus_mcp55[1];j<bus_mcp55[2]; j++) bus_type[j] = 1;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
@ -125,14 +112,7 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
if (dev) {
bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for(j=bus_mcp55[i];j<bus_isa; j++) bus_type[j] = 1;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 );
bus_isa = bus_mcp55[i-1]+1;
}
}

1
src/mainboard/gigabyte/m57sli/irq_tables.c
View File

@ -50,7 +50,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; //1

15
src/mainboard/gigabyte/m57sli/mptable.c
View File

@ -27,18 +27,15 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; //1
extern unsigned apicid_mcp55;
extern unsigned bus_type[256];
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned sbdn;
int i,j,k;
int i, j, k, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -49,13 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
sbdn = sysconf.sbdn;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(j= 0; j < 256 ; j++) {
if(bus_type[j])
smp_write_bus(mc, j, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
@ -106,7 +97,7 @@ static void *smp_write_config_table(void *v)
}
/* On bus 1: the PCI bus slots...
pyhsical PCI slots are j = 7,8
physical PCI slots are j = 7,8
FireWire is j = 10
*/
k=2;

11
src/mainboard/hp/dl145_g1/get_bus_conf.c
View File

@ -13,7 +13,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa = 5 ;
unsigned char bus_8131_0 = 1;
unsigned char bus_8131_1 = 2;
unsigned char bus_8131_2 = 3;
@ -82,11 +81,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
@ -105,11 +99,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);

11
src/mainboard/hp/dl145_g1/mptable.c
View File

@ -6,7 +6,6 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_8131_0;
extern unsigned char bus_8131_1;
extern unsigned char bus_8131_2;
@ -21,7 +20,7 @@ extern unsigned sbdn3;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -31,13 +30,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, apicid_8111, 0x20, IO_APIC_ADDR);

11
src/mainboard/hp/dl145_g3/get_bus_conf.c
View File

@ -108,11 +108,6 @@ void get_bus_conf(void)
printk(BIOS_DEBUG, "now found %s...\n",dev_path(dev));
if(dev) {
m->bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
printk(BIOS_DEBUG, "bus_isa 1=%d\n",m->bus_isa);
#endif
}
}
else {
@ -124,12 +119,6 @@ void get_bus_conf(void)
dev = dev_find_slot(m->bus_bcm5780[0], PCI_DEVFN(m->sbdn2 + i - 1,0));
if(dev) {
m->bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
printk(BIOS_DEBUG, "bus_isa 2=%d\n",m->bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_bcm5780[0], m->sbdn2+i-1);

1
src/mainboard/hp/dl145_g3/mb_sysconf.h
View File

@ -29,7 +29,6 @@
#define MB_SYSCONF_H
struct mb_sysconf_t {
unsigned char bus_isa;
unsigned char bus_bcm5780[7];
unsigned char bus_bcm5785_0;
unsigned char bus_bcm5785_1;

26
src/mainboard/hp/dl145_g3/mptable.c
View File

@ -43,6 +43,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
struct mb_sysconf_t *m;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -53,22 +54,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
m = sysconf.mb;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
#if 0
unsigned char bus_num;
for(bus_num = 0; bus_num < m->bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
printk(BIOS_DEBUG, "writing bus %d as PCI...\n",bus_num);
}
#endif
smp_write_bus(mc, 0, "PCI ");
smp_write_bus(mc, 1, "PCI ");
smp_write_bus(mc, 7, "PCI ");
smp_write_bus(mc, 8, "PCI ");
smp_write_bus(mc,m->bus_isa, "ISA ");
printk(BIOS_DEBUG, "writing %d as ISA...\n",m->bus_isa);
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
@ -130,7 +116,7 @@ static void *smp_write_config_table(void *v)
}
}
mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_bcm5785[0], 0);
mptable_add_isa_interrupts(mc, bus_isa, m->apicid_bcm5785[0], 0);
//SATA
/* printk(BIOS_DEBUG, "MPTABLE_SATA: bus_id:%d irq:%d apic_id:%d pin:%d\n",m->bus_bcm5785_1, (0x0e<<2)|0, m->apicid_bcm5785[0], 0x7); */
@ -177,9 +163,9 @@ static void *smp_write_config_table(void *v)
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
printk(BIOS_DEBUG, "m->bus_isa is: %x\n",m->bus_isa);
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa , 0x0, MP_APIC_ALL, 0x1);
printk(BIOS_DEBUG, "bus_isa is: %x\n", bus_isa);
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa , 0x0, MP_APIC_ALL, 0x1);
//extended table entries
smp_write_address_space(mc,0 , ADDRESS_TYPE_IO, 0x0, 0x0, 0x0, 0x0001);

10
src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c
View File

@ -110,11 +110,6 @@ void get_bus_conf(void)
printk(BIOS_DEBUG, "now found %s...\n",dev_path(dev));
if(dev) {
m->bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
printk(BIOS_DEBUG, "bus_isa 1=%d\n",m->bus_isa);
#endif
}
}
else {
@ -126,11 +121,6 @@ void get_bus_conf(void)
dev = dev_find_slot(m->bus_bcm5780[0], PCI_DEVFN(m->sbdn2 + i - 1,0));
if(dev) {
m->bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
printk(BIOS_DEBUG, "bus_isa 2=%d\n",m->bus_isa);
#endif
}
else {

2
src/mainboard/hp/dl165_g6_fam10/mb_sysconf.h
View File

@ -29,7 +29,6 @@
#define MB_SYSCONF_H
struct mb_sysconf_t {
unsigned char bus_isa;
unsigned char bus_bcm5780[7];
unsigned char bus_bcm5785_0;
unsigned char bus_bcm5785_1;
@ -37,7 +36,6 @@ struct mb_sysconf_t {
unsigned apicid_bcm5785[3];
unsigned sbdn2;
unsigned bus_type[256];
};
#endif

1
src/mainboard/hp/dl165_g6_fam10/mptable.c
View File

@ -56,7 +56,6 @@ static void *smp_write_config_table(void *v)
m = sysconf.mb;
mptable_write_buses(mc, NULL, &isa_bus);
printk(BIOS_DEBUG, "writing %d as ISA to mptable (%d for real)...\n", isa_bus, m->bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{

15
src/mainboard/ibase/mb899/mptable.c
View File

@ -29,8 +29,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
struct device *riser = NULL, *firewire = NULL;
int i;
int max_pci_bus, firewire_bus = 0, riser_bus = 0, isa_bus;
int firewire_bus = 0, riser_bus = 0, isa_bus;
int ioapic_id;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -38,14 +37,12 @@ static void *smp_write_config_table(void *v)
mptable_init(mc, "MB899 ", LAPIC_ADDR);
smp_write_processors(mc);
max_pci_bus=0;
firewire = dev_find_device(0x104c, 0x8023, 0);
if (firewire) {
firewire_bus = firewire->bus->secondary;
printk(BIOS_SPEW, "Firewire device is on bus %x\n",
firewire_bus);
max_pci_bus = firewire_bus;
}
// If a riser card is used, this riser is detected on bus 4, so its secondary bus is the
@ -56,17 +53,9 @@ static void *smp_write_config_table(void *v)
if (riser) {
riser_bus = riser->link_list->secondary;
printk(BIOS_SPEW, "Riser bus is %x\n", riser_bus);
max_pci_bus = riser_bus;
}
/* ISA bus follows */
isa_bus = max_pci_bus + 1;
/* Bus: Bus ID Type */
for (i=0; i <= max_pci_bus; i++)
smp_write_bus(mc, i, "PCI ");
smp_write_bus(mc, isa_bus, "ISA ");
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
ioapic_id = 2;

12
src/mainboard/ibm/e325/mptable.c
View File

@ -9,8 +9,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_8111_0;
unsigned char bus_8111_1;
unsigned char bus_8131_1;
@ -30,13 +29,10 @@ static void *smp_write_config_table(void *v)
if (dev) {
bus_8111_0 = pci_read_config8(dev, PCI_PRIMARY_BUS);
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_0 = 1;
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
@ -59,11 +55,7 @@ static void *smp_write_config_table(void *v)
}
}
/* define bus and isa numbers */
for (bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* Legacy IOAPIC #2 */
smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);

12
src/mainboard/ibm/e326/mptable.c
View File

@ -9,8 +9,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_8111_0;
unsigned char bus_8111_1;
unsigned char bus_8131_1;
@ -30,13 +29,10 @@ static void *smp_write_config_table(void *v)
if (dev) {
bus_8111_0 = pci_read_config8(dev, PCI_PRIMARY_BUS);
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_0 = 1;
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
@ -58,11 +54,7 @@ static void *smp_write_config_table(void *v)
}
}
/* define bus and isa numbers */
for (bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* Legacy IOAPIC #2 */
smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);

14
src/mainboard/intel/d945gclf/mptable.c
View File

@ -28,8 +28,7 @@
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int i;
int max_pci_bus, isa_bus;
int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -37,16 +36,7 @@ static void *smp_write_config_table(void *v)
smp_write_processors(mc);
max_pci_bus = 5; // XXX read me from bridges.
/* ISA bus follows */
isa_bus = max_pci_bus + 1;
/* Bus: Bus ID Type */
for (i=0; i <= max_pci_bus; i++)
smp_write_bus(mc, i, "PCI ");
smp_write_bus(mc, isa_bus, "ISA ");
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);

16
src/mainboard/iwill/dk8_htx/get_bus_conf.c
View File

@ -109,11 +109,6 @@ void get_bus_conf(void)
dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
if (dev) {
m->bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8111_0, sysconf.sbdn);
@ -132,11 +127,6 @@ void get_bus_conf(void)
dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1,0));
if (dev) {
m->bus_8132_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132_0, m->sbdn3+1);
@ -172,9 +162,6 @@ void get_bus_conf(void)
dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1,0));
if (dev) {
m->bus_8132a[j][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]+1);
@ -191,9 +178,6 @@ void get_bus_conf(void)
if (dev) {
m->bus_8151[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
// printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151[j][1]);
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8151[j][0], m->sbdn5[j]+1);

1
src/mainboard/iwill/dk8_htx/mb_sysconf.h
View File

@ -3,7 +3,6 @@
#define MB_SYSCONF_H
struct mb_sysconf_t {
unsigned char bus_isa;
unsigned char bus_8132_0;
unsigned char bus_8132_1;
unsigned char bus_8132_2;

16
src/mainboard/iwill/dk8_htx/mptable.c
View File

@ -13,8 +13,7 @@
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
int i, j;
int i, j, bus_isa;
struct mb_sysconf_t *m;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -27,12 +26,7 @@ static void *smp_write_config_table(void *v)
m = sysconf.mb;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < m->bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, m->bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111
@ -83,7 +77,7 @@ static void *smp_write_config_table(void *v)
}
mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_8111, 0);
mptable_add_isa_interrupts(mc, bus_isa, m->apicid_8111, 0);
//??? What
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_0, ((sysconf.sbdn+1)<<2)|3, m->apicid_8111, 0x13);
@ -173,8 +167,8 @@ static void *smp_write_config_table(void *v)
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */

17
src/mainboard/iwill/dk8s2/mptable.c
View File

@ -8,8 +8,7 @@
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
unsigned char bus_8111_1;
@ -27,44 +26,32 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
if (dev) {
bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
bus_8131_1 = 2;
}
/* 8131-2 */
dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
bus_8131_2 = 3;
}
}
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);

17
src/mainboard/iwill/dk8x/mptable.c
View File

@ -8,8 +8,7 @@
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
unsigned char bus_8111_1;
@ -27,44 +26,32 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
if (dev) {
bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
bus_8131_1 = 2;
}
/* 8131-2 */
dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
bus_8131_2 = 3;
}
}
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);

23
src/mainboard/msi/ms7135/get_bus_conf.c
View File

@ -38,7 +38,6 @@
* mptable and acpi_tables.
*/
/* busnum is default */
unsigned char bus_isa;
unsigned char bus_ck804[6];
unsigned apicid_ck804;
@ -49,9 +48,6 @@ unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO
unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020, //ms7135 has only one ht-chain
};
unsigned bus_type[256];
static unsigned get_bus_conf_done = 0;
@ -61,7 +57,7 @@ void get_bus_conf(void)
device_t dev;
unsigned sbdn;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; //do it only once
@ -84,16 +80,8 @@ void get_bus_conf(void)
bus_ck804[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0;
}
bus_type[0] = 1; //pci
bus_ck804[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_type[bus_ck804[0]] = 1;
/* CK804 */
int dn = -1;
for (i = 1; i < 4; i++) {
@ -106,15 +94,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + dn, 0));
if (dev) {
bus_ck804[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_ck804[i]; j < bus_isa; j++)
bus_type[j] = 1;
} else {
printk
(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
bus_ck804[0], sbdn + dn);
bus_isa = bus_ck804[i - 1] + 1;
}
}

1
src/mainboard/msi/ms7135/irq_tables.c
View File

@ -35,7 +35,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_ck804[6];

25
src/mainboard/msi/ms7260/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts (shared by irqtable/mptable/acpi_table). */
// busnum is default.
unsigned char bus_isa;
unsigned char bus_mcp55[8]; // 1
unsigned apicid_mcp55;
@ -65,17 +64,13 @@ unsigned hcdnx[] = {
// 0x20202020,
};
unsigned bus_type[256];
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
{
unsigned int apicid_base, sbdn;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* Do it only once. */
@ -96,23 +91,14 @@ void get_bus_conf(void)
for (i = 0; i < 8; i++)
bus_mcp55[i] = 0;
for (i = 0; i < 256; i++)
bus_type[i] = 0;
bus_type[0] = 1; /* PCI */
bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_type[bus_mcp55[0]] = 1;
/* MCP55 */
dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06, 0));
if (dev) {
bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_mcp55[2]++;
for (j = bus_mcp55[1]; j < bus_mcp55[2]; j++)
bus_type[j] = 1;
} else {
printk
(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n",
@ -127,15 +113,6 @@ void get_bus_conf(void)
PCI_DEVFN(sbdn + 0x0a + i - 2, 0));
if (dev) {
bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_mcp55[i]; j < bus_isa; j++)
bus_type[j] = 1;
} else {
printk
(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
bus_mcp55[0], sbdn + 0x0a + i - 2);
bus_isa = bus_mcp55[i - 1] + 1;
}
}

3
src/mainboard/msi/ms7260/irq_tables.c
View File

@ -46,11 +46,8 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
pirq_info->rfu = rfu;
}
extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; // 1
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

12
src/mainboard/msi/ms7260/mptable.c
View File

@ -26,16 +26,14 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; // 1
extern unsigned apicid_mcp55;
extern unsigned bus_type[256];
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned int sbdn;
int i, j;
int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -46,13 +44,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
sbdn = sysconf.sbdn;
/* Bus: Bus ID Type */
/* Define bus and ISA numbers. */
for (j = 0; j < 256; j++) {
if (bus_type[j])
smp_write_bus(mc, j, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

11
src/mainboard/msi/ms9185/get_bus_conf.c
View File

@ -105,11 +105,6 @@ void get_bus_conf(void)
dev = dev_find_slot(m->bus_bcm5785_1, PCI_DEVFN(0xd,0));
if(dev) {
m->bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
printk(BIOS_DEBUG, "bus_isa=%d\n",m->bus_isa);
#endif
}
}
else {
@ -121,12 +116,6 @@ void get_bus_conf(void)
dev = dev_find_slot(m->bus_bcm5780[0], PCI_DEVFN(m->sbdn2 + i - 1,0));
if(dev) {
m->bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
m->bus_isa++;
printk(BIOS_DEBUG, "bus_isa=%d\n",m->bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_bcm5780[0], m->sbdn2+i-1);

1
src/mainboard/msi/ms9185/mb_sysconf.h
View File

@ -25,7 +25,6 @@
#define MB_SYSCONF_H
struct mb_sysconf_t {
unsigned char bus_isa;
unsigned char bus_bcm5780[7];
unsigned char bus_bcm5785_0;
unsigned char bus_bcm5785_1;

22
src/mainboard/msi/ms9185/mptable.c
View File

@ -40,9 +40,8 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
int i;
struct mb_sysconf_t *m;
int i, bus_isa;
struct mb_sysconf_t *m;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -50,15 +49,10 @@ static void *smp_write_config_table(void *v)
smp_write_processors(mc);
get_bus_conf();
m = sysconf.mb;
get_bus_conf();
m = sysconf.mb;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < m->bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, m->bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
@ -76,7 +70,7 @@ static void *smp_write_config_table(void *v)
}
mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_bcm5785[0], 0);
mptable_add_isa_interrupts(mc, bus_isa, m->apicid_bcm5785[0], 0);
//IDE
outb(0x02, 0xc00); outb(0x0e, 0xc01);
@ -152,8 +146,8 @@ static void *smp_write_config_table(void *v)
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */

18
src/mainboard/msi/ms9282/get_bus_conf.c
View File

@ -75,7 +75,7 @@ void get_bus_conf(void)
struct mb_sysconf_t *m;
device_t dev;
int i, j;
int i;
if(get_bus_conf_done==1) return; //do it only once
@ -96,8 +96,6 @@ void get_bus_conf(void)
sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
m->bus_type[0] = 1; //pci
m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
/* MCP55 */
@ -119,20 +117,6 @@ void get_bus_conf(void)
}
}
for(i=0; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned busn_max = (sysconf.pci1234[i] >> 24) & 0xff;
for (j = busn; j <= busn_max; j++)
m->bus_type[j] = 1;
if(m->bus_isa <= busn_max)
m->bus_isa = busn_max + 1;
printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
}
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);

3
src/mainboard/msi/ms9282/mb_sysconf.h
View File

@ -26,11 +26,8 @@
#define MB_SYSCONF_H
struct mb_sysconf_t {
unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
unsigned bus_type[256];
};
#endif

22
src/mainboard/msi/ms9282/mptable.c
View File

@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v)
struct mb_sysconf_t *m;
unsigned sbdn;
int i,j;
int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -44,17 +44,11 @@ static void *smp_write_config_table(void *v)
smp_write_processors(mc);
get_bus_conf();
sbdn = sysconf.sbdn;
m = sysconf.mb;
get_bus_conf();
sbdn = sysconf.sbdn;
m = sysconf.mb;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(j= 0; j < 256 ; j++) {
if(m->bus_type[j])
smp_write_bus(mc, j, "PCI ");
}
smp_write_bus(mc, m->bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
@ -83,7 +77,7 @@ static void *smp_write_config_table(void *v)
}
mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
//SMBUS
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa);
@ -121,8 +115,8 @@ static void *smp_write_config_table(void *v)
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */

15
src/mainboard/msi/ms9652_fam10/get_bus_conf.c
View File

@ -72,7 +72,7 @@ void get_bus_conf(void)
struct mb_sysconf_t *m;
device_t dev;
int i, j;
int i;
printk(BIOS_SPEW, "get_bus_conf()\n");
@ -93,7 +93,6 @@ void get_bus_conf(void)
get_pci1234();
m->bus_type[0] = 1; //pci
sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
m->bus_mcp55[0] = (sysconf.pci1234[0] >> 12) & 0xff;
@ -116,18 +115,6 @@ void get_bus_conf(void)
}
}
for(i=0; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned busn_max = (sysconf.pci1234[i] >> 20) & 0xff;
for (j = busn; j <= busn_max; j++)
m->bus_type[j] = 1;
if(m->bus_isa <= busn_max)
m->bus_isa = busn_max + 1;
printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
}
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);

3
src/mainboard/msi/ms9652_fam10/mb_sysconf.h
View File

@ -23,11 +23,8 @@
#define MB_SYSCONF_H
struct mb_sysconf_t {
unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
unsigned bus_type[256];
};
#endif

16
src/mainboard/msi/ms9652_fam10/mptable.c
View File

@ -33,7 +33,7 @@ static void *smp_write_config_table(void *v)
struct mb_sysconf_t *m;
unsigned sbdn;
int i,j;
int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -45,13 +45,7 @@ static void *smp_write_config_table(void *v)
sbdn = sysconf.sbdn;
m = sysconf.mb;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(j= 0; j < 256 ; j++) {
if(m->bus_type[j])
smp_write_bus(mc, j, "PCI ");
}
smp_write_bus(mc, m->bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
@ -80,7 +74,7 @@ static void *smp_write_config_table(void *v)
}
mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa);
@ -110,8 +104,8 @@ static void *smp_write_config_table(void *v)
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */

17
src/mainboard/newisys/khepri/mptable.c
View File

@ -8,8 +8,7 @@
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
unsigned char bus_8111_1;
@ -27,44 +26,32 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
if (dev) {
bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
bus_8131_1 = 2;
}
/* 8131-2 */
dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
bus_8131_2 = 3;
}
}
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */

19
src/mainboard/nvidia/l1_2pvv/get_bus_conf.c
View File

@ -95,7 +95,7 @@ void get_bus_conf(void)
unsigned apicid_base;
struct mb_sysconf_t *m;
int i, j;
int i;
if (get_bus_conf_done)
return; //do it only once
@ -119,25 +119,8 @@ void get_bus_conf(void)
m->sbdnb = (sysconf.hcdn[1] & 0xff); // first byte of second chain
m->bus_type[0] = 1; //pci
m->bus_mcp55 = (sysconf.pci1234[0] >> 16) & 0xff;
for (i = 0; i < sysconf.hc_possible_num; i++) {
unsigned busn_min, busn_max;
if (!(sysconf.pci1234[i] & 0x1))
continue;
busn_min = (sysconf.pci1234[i] >> 16) & 0xff;
busn_max = (sysconf.pci1234[i] >> 24) & 0xff;
for (j = busn_min; j <= busn_max; j++)
m->bus_type[j] = 1;
if(m->bus_isa <= busn_max)
m->bus_isa = busn_max + 1;
printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn_min, busn_max, m->bus_isa);
}
/* MCP55b */
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x0f))

4
src/mainboard/nvidia/l1_2pvv/mb_sysconf.h
View File

@ -23,15 +23,11 @@
#define MB_SYSCONF_H
struct mb_sysconf_t {
unsigned char bus_isa;
unsigned char bus_mcp55;
unsigned char bus_mcp55b;
unsigned apicid_mcp55;
unsigned apicid_mcp55b;
unsigned bus_type[256];
unsigned sbdnb;
};
#endif

16
src/mainboard/nvidia/l1_2pvv/mptable.c
View File

@ -32,7 +32,7 @@ static void *smp_write_config_table(void *v)
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
int i,j;
int i, j, bus_isa;
unsigned char apicpin[4];
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -45,13 +45,7 @@ static void *smp_write_config_table(void *v)
sbdn = sysconf.sbdn;
m = sysconf.mb;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for (j = 0; j < 256 ; j++) {
if (m->bus_type[j])
smp_write_bus(mc, j, "PCI ");
}
smp_write_bus(mc, m->bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
@ -104,7 +98,7 @@ static void *smp_write_config_table(void *v)
}
mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55, ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa); // 10
@ -167,8 +161,8 @@ static void *smp_write_config_table(void *v)
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */

14
src/mainboard/roda/rk886ex/mptable.c
View File

@ -30,8 +30,7 @@
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int i;
int max_pci_bus, isa_bus;
int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -39,16 +38,7 @@ static void *smp_write_config_table(void *v)
smp_write_processors(mc);
max_pci_bus = 5; // XXX read me from bridges.
/* ISA bus follows */
isa_bus = max_pci_bus + 1;
/* Bus: Bus ID Type */
for (i=0; i <= max_pci_bus; i++)
smp_write_bus(mc, i, "PCI ");
smp_write_bus(mc, isa_bus, "ISA ");
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);

6
src/mainboard/sunw/ultra40/get_bus_conf.c
View File

@ -12,7 +12,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa;
unsigned char bus_ck804_0; //1
unsigned char bus_ck804_1; //2
unsigned char bus_ck804_2; //3
@ -178,8 +177,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
@ -245,8 +242,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e,0));
if (dev) {
bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0e);
@ -254,7 +249,6 @@ void get_bus_conf(void)
bus_ck804b_5 = bus_ck804b_4+1;
#endif
bus_isa = bus_ck804b_5+1;
}
}

11
src/mainboard/sunw/ultra40/mptable.c
View File

@ -5,7 +5,6 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
@ -36,8 +35,7 @@ extern unsigned sbdnb;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
int i;
int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -47,12 +45,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{

11
src/mainboard/tyan/s2881/get_bus_conf.c
View File

@ -13,7 +13,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa = 5 ;
unsigned char bus_8131_0 = 1;
unsigned char bus_8131_1 = 2;
unsigned char bus_8131_2 = 3;
@ -82,11 +81,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
@ -105,11 +99,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);

12
src/mainboard/tyan/s2881/mptable.c
View File

@ -6,7 +6,6 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_8131_0;
extern unsigned char bus_8131_1;
extern unsigned char bus_8131_2;
@ -21,8 +20,7 @@ extern unsigned sbdn3;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
int i;
int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -32,13 +30,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);

14
src/mainboard/tyan/s2882/mptable.c
View File

@ -46,8 +46,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
@ -76,14 +75,11 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
@ -108,13 +104,7 @@ static void *smp_write_config_table(void *v)
bus_8131_2 = 3;
}
}
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1

14
src/mainboard/tyan/s2885/get_bus_conf.c
View File

@ -12,7 +12,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa = 7 ;
unsigned char bus_8131_0 = 1;
unsigned char bus_8131_1 = 2;
unsigned char bus_8131_2 = 3;
@ -85,11 +84,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
@ -108,12 +102,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
@ -128,8 +116,6 @@ void get_bus_conf(void)
if (dev) {
bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
// printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151_1);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
/*I/O APICs: APIC ID Version State Address*/

11
src/mainboard/tyan/s2885/mptable.c
View File

@ -6,7 +6,6 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_8131_0;
extern unsigned char bus_8131_1;
extern unsigned char bus_8131_2;
@ -24,8 +23,7 @@ extern unsigned sbdn5;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned char bus_num;
int i;
int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -35,12 +33,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR); //8111

6
src/mainboard/tyan/s2891/get_bus_conf.c
View File

@ -12,7 +12,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa;
unsigned char bus_ck804_0; //1
unsigned char bus_ck804_1; //2
unsigned char bus_ck804_2; //3
@ -117,8 +116,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
if (dev) {
bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
@ -142,14 +139,11 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
bus_8131_2 = bus_8131_1+1;
bus_isa = bus_8131_1+2;
}
if(sysconf.pci1234[2] & 1) {

1
src/mainboard/tyan/s2891/irq_tables.c
View File

@ -30,7 +30,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3

11
src/mainboard/tyan/s2891/mptable.c
View File

@ -5,7 +5,6 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
@ -25,8 +24,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned sbdn;
unsigned char bus_num;
int i;
int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -37,12 +35,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
sbdn = sysconf.sbdn;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{

6
src/mainboard/tyan/s2892/get_bus_conf.c
View File

@ -12,7 +12,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa;
unsigned char bus_ck804_0; //1
unsigned char bus_ck804_1; //2
unsigned char bus_ck804_2; //3
@ -114,8 +113,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
if (dev) {
bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
@ -139,14 +136,11 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
bus_8131_2 = bus_8131_1+1;
bus_isa = bus_8131_1+2;
}

1
src/mainboard/tyan/s2892/irq_tables.c
View File

@ -30,7 +30,6 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->rfu = rfu;
}
extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3

11
src/mainboard/tyan/s2892/mptable.c
View File

@ -5,7 +5,6 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
@ -25,8 +24,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned sbdn;
unsigned char bus_num;
int i;
int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -37,12 +35,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
sbdn = sysconf.sbdn;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{

6
src/mainboard/tyan/s2895/get_bus_conf.c
View File

@ -12,7 +12,6 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_isa;
unsigned char bus_ck804_0; //1
unsigned char bus_ck804_1; //2
unsigned char bus_ck804_2; //3
@ -134,8 +133,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
@ -151,13 +148,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e,0));
if (dev) {
bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0e);
bus_ck804b_5 = bus_ck804b_4+1;
bus_isa = bus_ck804b_5+1;
}
}

11
src/mainboard/tyan/s2895/mptable.c
View File

@ -5,7 +5,6 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
@ -33,8 +32,7 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned sbdn;
unsigned char bus_num;
int i;
int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -45,12 +43,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
sbdn = sysconf.sbdn;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{

16
src/mainboard/tyan/s2912/get_bus_conf.c
View File

@ -71,7 +71,7 @@ void get_bus_conf(void)
struct mb_sysconf_t *m;
device_t dev;
int i, j;
int i;
if(get_bus_conf_done==1) return; //do it only once
@ -92,8 +92,6 @@ void get_bus_conf(void)
sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
m->bus_type[0] = 1; //pci
m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
/* MCP55 */
@ -113,18 +111,6 @@ void get_bus_conf(void)
}
}
for(i=0; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned busn_max = (sysconf.pci1234[i] >> 24) & 0xff;
for (j = busn; j <= busn_max; j++)
m->bus_type[j] = 1;
if(m->bus_isa <= busn_max)
m->bus_isa = busn_max + 1;
printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
}
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);

3
src/mainboard/tyan/s2912/mb_sysconf.h
View File

@ -23,11 +23,8 @@
#define MB_SYSCONF_H
struct mb_sysconf_t {
unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
unsigned bus_type[256];
};
#endif

16
src/mainboard/tyan/s2912/mptable.c
View File

@ -32,7 +32,7 @@ static void *smp_write_config_table(void *v)
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
int i,j;
int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -44,13 +44,7 @@ static void *smp_write_config_table(void *v)
sbdn = sysconf.sbdn;
m = sysconf.mb;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(j= 0; j < 256 ; j++) {
if(m->bus_type[j])
smp_write_bus(mc, j, "PCI ");
}
smp_write_bus(mc, m->bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
@ -79,7 +73,7 @@ static void *smp_write_config_table(void *v)
}
mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa);
@ -108,8 +102,8 @@ static void *smp_write_config_table(void *v)
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */

15
src/mainboard/tyan/s2912_fam10/get_bus_conf.c
View File

@ -72,7 +72,7 @@ void get_bus_conf(void)
struct mb_sysconf_t *m;
device_t dev;
int i, j;
int i;
if(get_bus_conf_done==1) return; //do it only once
@ -91,7 +91,6 @@ void get_bus_conf(void)
get_pci1234();
m->bus_type[0] = 1; //pci
sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
m->bus_mcp55[0] = (sysconf.pci1234[0] >> 12) & 0xff;
@ -114,18 +113,6 @@ void get_bus_conf(void)
}
}
for(i=0; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
unsigned busn_max = (sysconf.pci1234[i] >> 20) & 0xff;
for (j = busn; j <= busn_max; j++)
m->bus_type[j] = 1;
if(m->bus_isa <= busn_max)
m->bus_isa = busn_max + 1;
printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
}
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);

3
src/mainboard/tyan/s2912_fam10/mb_sysconf.h
View File

@ -23,11 +23,8 @@
#define MB_SYSCONF_H
struct mb_sysconf_t {
unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
unsigned bus_type[256];
};
#endif

16
src/mainboard/tyan/s2912_fam10/mptable.c
View File

@ -32,7 +32,7 @@ static void *smp_write_config_table(void *v)
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
int i,j;
int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -44,13 +44,7 @@ static void *smp_write_config_table(void *v)
sbdn = sysconf.sbdn;
m = sysconf.mb;
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(j= 0; j < 256 ; j++) {
if(m->bus_type[j])
smp_write_bus(mc, j, "PCI ");
}
smp_write_bus(mc, m->bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
@ -79,7 +73,7 @@ static void *smp_write_config_table(void *v)
}
mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa);
@ -108,8 +102,8 @@ static void *smp_write_config_table(void *v)
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */