southbridge/amd/sb700: Recover if AHCI disk detection fails
The SB700 silicon is somewhat buggy; if the links come up in an incorrect state after POR the silicon cannot automatically recover. If a disk fails to come online, reset the associated link and try disk detection again. Change-Id: I29051af5eca5d31b6aecc261e9a48028380eccb3 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11999 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Timothy Pearson
Stefan Reinauer
parent
31ec0f3257
commit
5260a44a96
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@ -27,12 +27,15 @@
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static int sata_drive_detect(int portnum, uint16_t iobar)
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{
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u8 byte, byte2;
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u8 byte_prev, byte2_prev;
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int i = 0;
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byte_prev = byte2_prev = 0;
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outb(0xa0 + 0x10 * (portnum % 2), iobar + 0x6);
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while (byte = inb(iobar + 0x6), byte2 = inb(iobar + 0x7),
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(byte != (0xa0 + 0x10 * (portnum % 2))) ||
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((byte2 & 0x88) != 0)) {
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printk(BIOS_SPEW, "0x6=%x, 0x7=%x\n", byte, byte2);
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if ((byte != byte_prev) || (byte2 != byte2_prev))
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printk(BIOS_SPEW, "0x6=%x, 0x7=%x\n", byte, byte2);
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if (byte != (0xa0 + 0x10 * (portnum % 2))) {
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/* This will happen at the first iteration of this loop
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* if the first SATA port is unpopulated and the
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@ -41,11 +44,22 @@ static int sata_drive_detect(int portnum, uint16_t iobar)
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printk(BIOS_DEBUG, "drive no longer selected after %i ms, "
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"retrying init\n", i * 10);
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return 1;
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} else
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printk(BIOS_SPEW, "drive detection not yet completed, "
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"waiting...\n");
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} else {
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if (i == 0)
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printk(BIOS_SPEW, "drive detection not yet completed, "
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"waiting...\n");
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}
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mdelay(10);
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i++;
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byte_prev = byte;
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byte2_prev = byte2;
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/* Detect stuck SATA controller and attempt reset */
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if (i > 1024) {
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printk(BIOS_DEBUG, "drive detection not done after %i ms, "
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"resetting HBA and retrying init\n", i * 10);
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return 2;
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}
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}
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printk(BIOS_SPEW, "drive detection done after %i ms\n", i * 10);
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return 0;
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@ -101,12 +115,13 @@ static void sata_init(struct device *dev)
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uint16_t sata_bar0, sata_bar1, sata_bar2, sata_bar3, sata_bar4;
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uint16_t ide_bar0, ide_bar1, ide_bar2, ide_bar3;
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uint16_t current_bar;
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int i, j;
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int i, j, ret;
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uint8_t nvram;
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uint8_t sata_ahci_mode;
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uint8_t sata_alpm_enable;
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uint8_t port_count;
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uint8_t max_port_count;
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uint8_t hba_reset_count;
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sata_ahci_mode = 0;
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if (get_option(&nvram, "sata_ahci_mode") == CB_SUCCESS)
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@ -120,14 +135,23 @@ static void sata_init(struct device *dev)
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/* SATA SMBus Disable */
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sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
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hba_reset_count = 0;
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retry_init:
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byte = pci_read_config8(sm_dev, 0xad);
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/* Disable SATA SMBUS */
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byte |= (1 << 0);
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/* Enable SATA and power saving */
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byte |= (1 << 1);
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/* Enable SATA and power saving */
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byte |= (1 << 0);
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byte |= (1 << 5);
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pci_write_config8(sm_dev, 0xad, byte);
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/* Take the PHY logic out of reset */
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word = pci_read_config16(dev, 0x84);
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word |= 0x1 << 2;
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word &= ~0x1f8;
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pci_write_config16(dev, 0x84, word);
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/* get rev_id */
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rev_id = pci_read_config8(sm_dev, 0x08) - 0x28;
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@ -320,6 +344,26 @@ static void sata_init(struct device *dev)
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if (port_count > max_port_count)
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port_count = max_port_count;
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/* Send COMRESET to all ports */
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for (i = 0; i < port_count; i++) {
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/* Read in Port-N Serial ATA Control Register */
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byte = read8(sata_bar5 + 0x12C + 0x80 * i);
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/* Set Reset Bit */
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byte |= 0x1;
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write8((sata_bar5 + 0x12C + 0x80 * i), byte);
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/* Wait 1ms */
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mdelay(1);
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/* Clear Reset Bit */
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byte &= ~0x01;
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write8((sata_bar5 + 0x12C + 0x80 * i), byte);
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/* Wait 1ms */
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mdelay(1);
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}
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/* RPR7.7 SATA drive detection. */
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/* Use BAR5+0x128,BAR0 for Primary Slave */
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/* Use BAR5+0x1A8,BAR0 for Primary Slave */
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@ -365,8 +409,31 @@ static void sata_init(struct device *dev)
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current_bar = ((i / 2) == 0) ? sata_bar0 : sata_bar2;
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else
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current_bar = ide_bar0;
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if (!sata_drive_detect(i, current_bar))
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ret = sata_drive_detect(i, current_bar);
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if (ret == 0) {
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break;
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} else if (ret == 2) {
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/* Reset PHY logic */
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word = pci_read_config16(dev, 0x84);
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word &= ~(0x1 << 2);
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word |= 0x1f8;
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pci_write_config16(dev, 0x84, word);
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/* Disable SATA controller */
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byte = pci_read_config8(sm_dev, 0xad);
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byte &= ~(0x1);
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pci_write_config8(sm_dev, 0xad, byte);
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mdelay(100);
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/* Retry initialization */
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hba_reset_count++;
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if (hba_reset_count < 16)
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goto retry_init;
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else
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printk(BIOS_WARNING, "HBA reset count exceeded, "
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"continuing but AHCI drives may not function\n");
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}
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}
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if (sata_ahci_mode)
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printk(BIOS_DEBUG, "AHCI device %d is %sready after %i tries\n",
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