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soc/intel/meteorlake: Add IOE P2SB Base Address 

This patch introduces a new config named IOE_PCR_BASE_ADDRESS to define
P2SB base address.

BUG=b:290856936
TEST=Able to build and boot google/rex.

Change-Id: I289358f9c53b557a397bd7186e6b7419c5d8c954
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76411
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2023-07-12 14:31:09 +05:30
parent 4a53ba738d
commit 5557fbe406
2 changed files with 7 additions and 1 deletions
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6
src/soc/intel/meteorlake/Kconfig
View File

@ -236,6 +236,12 @@ config PCR_BASE_ADDRESS
help help
This option allows you to select MMIO Base Address of sideband bus. This option allows you to select MMIO Base Address of sideband bus.
config IOE_PCR_BASE_ADDRESS
hex
default 0x3fff0000000
help
This option allows you to select MMIO Base Address of IOE sideband bus.
config ECAM_MMCONF_BASE_ADDRESS config ECAM_MMCONF_BASE_ADDRESS
default 0xc0000000 default 0xc0000000

2
src/soc/intel/meteorlake/include/soc/iomap.h
View File

@ -64,7 +64,7 @@
#define P2SB_BAR CONFIG_PCR_BASE_ADDRESS #define P2SB_BAR CONFIG_PCR_BASE_ADDRESS
#define P2SB_SIZE (16 * MiB) #define P2SB_SIZE (16 * MiB)
#define IOE_PCR_ABOVE_4G_BASE_ADDR 0x3fff0000000 #define IOE_PCR_ABOVE_4G_BASE_ADDR CONFIG_IOE_PCR_BASE_ADDRESS
#define IOE_P2SB_BAR IOE_PCR_ABOVE_4G_BASE_ADDR #define IOE_P2SB_BAR IOE_PCR_ABOVE_4G_BASE_ADDR
#define IOE_P2SB_SIZE (256 * MiB) #define IOE_P2SB_SIZE (256 * MiB)