soc/amd/picasso/aoac: Add wait_for_aoac_enabled

This way drivers can wait for their devices to be enabled.

I also rewrote enable_aoac_devices to take advantage of
wait_for_aoac_enabled.

BUG=b:153001807
TEST=Trembyle builds

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I8e653c857e164f90439e0028e08aa9608d4eca94
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42326
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Raul E Rangel 2020-06-11 16:53:57 -06:00 committed by Patrick Georgi
parent c64755bcd7
commit 5591b91b1a
2 changed files with 12 additions and 22 deletions

View File

@ -63,37 +63,26 @@ bool is_aoac_device_enabled(int dev)
return false;
}
static void enable_aoac_console_uart(void)
void wait_for_aoac_enabled(int dev)
{
if (!CONFIG(PICASSO_UART))
return;
power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
}
static bool is_aoac_console_uart_enabled(void)
{
if (!CONFIG(PICASSO_UART))
return true;
return is_aoac_device_enabled(FCH_AOAC_UART_FOR_CONSOLE);
while (!is_aoac_device_enabled(dev))
udelay(100);
}
void enable_aoac_devices(void)
{
bool status;
int i;
for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
power_on_aoac_device(aoac_devs[i]);
enable_aoac_console_uart();
if (CONFIG(PICASSO_UART))
power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
/* Wait for AOAC devices to indicate power and clock OK */
do {
udelay(100);
status = true;
for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
status &= is_aoac_device_enabled(aoac_devs[i]);
status &= is_aoac_console_uart_enabled();
} while (!status);
for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
wait_for_aoac_enabled(aoac_devs[i]);
if (CONFIG(PICASSO_UART))
wait_for_aoac_enabled(FCH_AOAC_UART_FOR_CONSOLE);
}

View File

@ -280,6 +280,7 @@ void enable_aoac_devices(void);
bool is_aoac_device_enabled(int dev);
void power_on_aoac_device(int dev);
void power_off_aoac_device(int dev);
void wait_for_aoac_enabled(int dev);
void sb_clk_output_48Mhz(void);
void sb_enable(struct device *dev);
void southbridge_final(void *chip_info);