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sb/intel/lynxpoint: Replace reg script with proper code 

Why use a Rube Goldberg machine to write and then read one register?

Change-Id: I282c12f162b5ae69c40729903c09ae81a14c9761
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2020-07-03 12:41:48 +02:00
parent 2e25ac6afe
commit 55d148ca37
1 changed files with 5 additions and 11 deletions
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16
src/southbridge/intel/lynxpoint/early_pch.c
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@ -17,15 +17,6 @@
#include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/gpio.h>
#endif #endif
const struct rcba_config_instruction pch_early_config[] = {
/* Enable IOAPIC */
RCBA_SET_REG_16(OIC, 0x0100),
/* PCH BWG says to read back the IOAPIC enable register */
RCBA_READ_REG_16(OIC),
RCBA_END_CONFIG,
};
int pch_is_lp(void) int pch_is_lp(void)
{ {
u8 id = pci_read_config8(PCH_LPC_DEV, PCI_DEVICE_ID + 1); u8 id = pci_read_config8(PCH_LPC_DEV, PCI_DEVICE_ID + 1);
@ -103,8 +94,11 @@ int early_pch_init(const void *gpio_map,
/* Enable SMBus for reading SPDs. */ /* Enable SMBus for reading SPDs. */
enable_smbus(); enable_smbus();
/* Early PCH RCBA settings */ /* Enable IOAPIC */
pch_config_rcba(pch_early_config); RCBA16(OIC) = 0x0100;
/* PCH BWG says to read back the IOAPIC enable register */
(void) RCBA16(OIC);
/* Mainboard RCBA settings */ /* Mainboard RCBA settings */
pch_config_rcba(rcba_config); pch_config_rcba(rcba_config);