GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

src/include: Drop unneeded empty lines 

Change-Id: Ie325541547ea10946f41a8f979d144a06a7e80eb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44611
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Elyes HAOUAS 2020-08-19 21:51:55 +02:00 committed by Patrick Georgi
parent 7c79d8302b
commit 563fc0889f
27 changed files with 0 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/include/console/flash.h
View File

@ -27,5 +27,4 @@ static inline void __flashconsole_tx_byte(u8 data) {}
static inline void __flashconsole_tx_flush(void) {} static inline void __flashconsole_tx_flush(void) {}
#endif /* __CONSOLE_FLASH_ENABLE__ */ #endif /* __CONSOLE_FLASH_ENABLE__ */
#endif /* CONSOLE_FLASH_H */ #endif /* CONSOLE_FLASH_H */

2
src/include/console/spi.h
View File

@ -52,6 +52,4 @@ struct em100_msg {
char data[MAX_MSG_LENGTH]; char data[MAX_MSG_LENGTH];
} __packed; } __packed;
#endif /* CONSOLE_SPI_H */ #endif /* CONSOLE_SPI_H */

1
src/include/cpu/intel/em64t100_save_state.h
View File

@ -66,7 +66,6 @@ typedef struct {
u64 rsi; u64 rsi;
u64 rdi; u64 rdi;
u64 io_mem_addr; u64 io_mem_addr;
u32 io_misc_info; u32 io_misc_info;

2
src/include/cpu/intel/em64t101_save_state.h
View File

@ -6,7 +6,6 @@
#include <types.h> #include <types.h>
#include <cpu/x86/smm.h> #include <cpu/x86/smm.h>
/* Intel Revision 30101 SMM State-Save Area /* Intel Revision 30101 SMM State-Save Area
* The following processor architectures use this: * The following processor architectures use this:
* - Westmere * - Westmere
@ -83,7 +82,6 @@ typedef struct {
u64 rsi; u64 rsi;
u64 rdi; u64 rdi;
u64 io_mem_addr; u64 io_mem_addr;
u32 io_misc_info; u32 io_misc_info;

1
src/include/cpu/intel/smm_reloc.h
View File

@ -51,7 +51,6 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase, uintptr_t staggered_
bool cpu_has_alternative_smrr(void); bool cpu_has_alternative_smrr(void);
#define MSR_PRMRR_PHYS_BASE 0x1f4 #define MSR_PRMRR_PHYS_BASE 0x1f4
#define MSR_PRMRR_PHYS_MASK 0x1f5 #define MSR_PRMRR_PHYS_MASK 0x1f5
#define MSR_UNCORE_PRMRR_PHYS_BASE 0x2f4 #define MSR_UNCORE_PRMRR_PHYS_BASE 0x2f4

1
src/include/cpu/intel/speedstep.h
View File

@ -18,7 +18,6 @@
*/ */
#define PMB1_BASE 0x800 #define PMB1_BASE 0x800
/* Speedstep related MSRs */ /* Speedstep related MSRs */
#define MSR_THERM2_CTL 0x19D #define MSR_THERM2_CTL 0x19D
#define MSR_EBC_FREQUENCY_ID 0x2c #define MSR_EBC_FREQUENCY_ID 0x2c

2
src/include/cpu/x86/msr.h
View File

@ -299,7 +299,6 @@ static inline enum mca_err_code_types mca_err_type(msr_t reg)
return MCA_ERRTYPE_UNKNOWN; return MCA_ERRTYPE_UNKNOWN;
} }
/* Helper for setting single MSR bits */ /* Helper for setting single MSR bits */
static inline void msr_set_bit(unsigned int reg, unsigned int bit) static inline void msr_set_bit(unsigned int reg, unsigned int bit)
{ {
@ -318,6 +317,5 @@ static inline void msr_set_bit(unsigned int reg, unsigned int bit)
wrmsr(reg, msr); wrmsr(reg, msr);
} }
#endif /* __ASSEMBLER__ */ #endif /* __ASSEMBLER__ */
#endif /* CPU_X86_MSR_H */ #endif /* CPU_X86_MSR_H */

1
src/include/cpu/x86/mtrr.h
View File

@ -27,7 +27,6 @@
#define MTRR_DEF_TYPE_EN (1 << 11) #define MTRR_DEF_TYPE_EN (1 << 11)
#define MTRR_DEF_TYPE_FIX_EN (1 << 10) #define MTRR_DEF_TYPE_FIX_EN (1 << 10)
#define IA32_SMRR_PHYS_BASE 0x1f2 #define IA32_SMRR_PHYS_BASE 0x1f2
#define IA32_SMRR_PHYS_MASK 0x1f3 #define IA32_SMRR_PHYS_MASK 0x1f3
#define SMRR_PHYS_MASK_LOCK (1 << 10) #define SMRR_PHYS_MASK_LOCK (1 << 10)

1
src/include/cpu/x86/post_code.h
View File

@ -3,7 +3,6 @@
#include <console/post_codes.h> #include <console/post_codes.h>
#if CONFIG(POST_IO) #if CONFIG(POST_IO)
#define post_code(value) \ #define post_code(value) \
movb $value, %al; \ movb $value, %al; \

1
src/include/device/dram/ddr3.h
View File

@ -19,7 +19,6 @@
#include <device/dram/common.h> #include <device/dram/common.h>
#include <types.h> #include <types.h>
/** /**
* Convenience definitions for SPD offsets * Convenience definitions for SPD offsets
* *

1
src/include/device/dram/ddr4.h
View File

@ -21,7 +21,6 @@
#define SPD_DDR4_PART_OFF 329 #define SPD_DDR4_PART_OFF 329
#define SPD_DDR4_PART_LEN 20 #define SPD_DDR4_PART_LEN 20
/* /*
* Module type (byte 3, bits 3:0) of SPD * Module type (byte 3, bits 3:0) of SPD
* This definition is specific to DDR4. DDR2/3 SPDs have a different structure. * This definition is specific to DDR4. DDR2/3 SPDs have a different structure.

1
src/include/device/hypertransport_def.h
View File

@ -18,7 +18,6 @@
#define HT_FREQ_2600Mhz 14 #define HT_FREQ_2600Mhz 14
#define HT_FREQ_VENDOR 15 /* AMD defines this to be 100Mhz */ #define HT_FREQ_VENDOR 15 /* AMD defines this to be 100Mhz */
static inline bool offset_unit_id(bool is_sb_ht_chain) static inline bool offset_unit_id(bool is_sb_ht_chain)
{ {
bool need_offset = (CONFIG_HT_CHAIN_UNITID_BASE != 1) bool need_offset = (CONFIG_HT_CHAIN_UNITID_BASE != 1)

1
src/include/device/path.h
View File

@ -137,7 +137,6 @@ struct device_path {
}; };
}; };
#define DEVICE_PATH_MAX 40 #define DEVICE_PATH_MAX 40
#define BUS_PATH_MAX (DEVICE_PATH_MAX+10) #define BUS_PATH_MAX (DEVICE_PATH_MAX+10)

2
src/include/device/pci_def.h
View File

@ -305,7 +305,6 @@
#define PCI_MSIX_PBA_OFFSET ~0x7 /* Offset into specified BAR */ #define PCI_MSIX_PBA_OFFSET ~0x7 /* Offset into specified BAR */
#define PCI_CAP_MSIX_SIZEOF 12 /* size of MSIX registers */ #define PCI_CAP_MSIX_SIZEOF 12 /* size of MSIX registers */
/* CompactPCI Hotswap Register */ /* CompactPCI Hotswap Register */
#define PCI_CHSWP_CSR 2 /* Control and Status Register */ #define PCI_CHSWP_CSR 2 /* Control and Status Register */
@ -521,7 +520,6 @@
#define PCI_PWR_CAP 12 /* Capability */ #define PCI_PWR_CAP 12 /* Capability */
#define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */ #define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */
/* /*
* The PCI interface treats multi-function devices as independent * The PCI interface treats multi-function devices as independent
* devices. The slot/function address of each device is encoded * devices. The slot/function address of each device is encoded

2
src/include/device/pci_ids.h
View File

@ -517,7 +517,6 @@
#define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505 #define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505
#define PCI_DEVICE_ID_NS_87410 0xd001 #define PCI_DEVICE_ID_NS_87410 0xd001
#define PCI_VENDOR_ID_TSENG 0x100c #define PCI_VENDOR_ID_TSENG 0x100c
#define PCI_DEVICE_ID_TSENG_W32P_2 0x3202 #define PCI_DEVICE_ID_TSENG_W32P_2 0x3202
#define PCI_DEVICE_ID_TSENG_W32P_b 0x3205 #define PCI_DEVICE_ID_TSENG_W32P_b 0x3205
@ -1664,7 +1663,6 @@
#define PCI_DEVICE_ID_ATT_L56XMF 0x0440 #define PCI_DEVICE_ID_ATT_L56XMF 0x0440
#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 #define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480
#define PCI_VENDOR_ID_SPECIALIX 0x11cb #define PCI_VENDOR_ID_SPECIALIX 0x11cb
#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 #define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000
#define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000 #define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000

1
src/include/device/pci_mmio_cfg.h
View File

@ -7,7 +7,6 @@
#include <device/mmio.h> #include <device/mmio.h>
#include <device/pci_type.h> #include <device/pci_type.h>
/* By not assigning this to CONFIG_MMCONF_BASE_ADDRESS here we /* By not assigning this to CONFIG_MMCONF_BASE_ADDRESS here we
* prevent some sub-optimal constant folding. */ * prevent some sub-optimal constant folding. */
extern u8 *const pci_mmconf; extern u8 *const pci_mmconf;

1
src/include/device/pnp.h
View File

@ -67,7 +67,6 @@ struct resource *pnp_get_resource(struct device *dev, unsigned int index);
void pnp_enable_devices(struct device *dev, struct device_operations *ops, void pnp_enable_devices(struct device *dev, struct device_operations *ops,
unsigned int functions, struct pnp_info *info); unsigned int functions, struct pnp_info *info);
struct pnp_mode_ops { struct pnp_mode_ops {
void (*enter_conf_mode)(struct device *dev); void (*enter_conf_mode)(struct device *dev);
void (*exit_conf_mode)(struct device *dev); void (*exit_conf_mode)(struct device *dev);

1
src/include/device/resource.h
View File

@ -109,7 +109,6 @@ static inline void *res2mmio(struct resource *res, unsigned long offset,
const struct device *largest_resource(struct bus *bus, struct resource **result_res, const struct device *largest_resource(struct bus *bus, struct resource **result_res,
unsigned long type_mask, unsigned long type); unsigned long type_mask, unsigned long type);
/* Compute and allocate resources. This is the main resource allocator entry point. */ /* Compute and allocate resources. This is the main resource allocator entry point. */
void allocate_resources(const struct device *root); void allocate_resources(const struct device *root);

6
src/include/device_tree.h
View File

@ -43,8 +43,6 @@ struct fdt_property
uint32_t size; uint32_t size;
}; };
/* /*
* Unflattened device tree structures. * Unflattened device tree structures.
*/ */
@ -88,8 +86,6 @@ struct device_tree
struct device_tree_node *root; struct device_tree_node *root;
}; };
/* /*
* Flattened device tree functions. These generally return the number of bytes * Flattened device tree functions. These generally return the number of bytes
* which were consumed reading the requested value. * which were consumed reading the requested value.
@ -109,8 +105,6 @@ int fdt_skip_node(const void *blob, uint32_t offset);
invalidates the unflattened one. */ invalidates the unflattened one. */
struct device_tree *fdt_unflatten(const void *blob); struct device_tree *fdt_unflatten(const void *blob);
/* /*
* Unflattened device tree functions. * Unflattened device tree functions.
*/ */

1
src/include/elog.h
View File

@ -202,7 +202,6 @@ struct elog_event_mem_cache_update {
#define ELOG_TYPE_MI_HRPC 0xb4 #define ELOG_TYPE_MI_HRPC 0xb4
#define ELOG_TYPE_MI_HR 0xb5 #define ELOG_TYPE_MI_HR 0xb5
struct elog_event_extended_event { struct elog_event_extended_event {
u8 event_type; u8 event_type;
u32 event_complement; u32 event_complement;

1
src/include/input-event-codes.h
View File

@ -870,7 +870,6 @@
#define ABS_MT_TOOL_X 0x3c /* Center X tool position */ #define ABS_MT_TOOL_X 0x3c /* Center X tool position */
#define ABS_MT_TOOL_Y 0x3d /* Center Y tool position */ #define ABS_MT_TOOL_Y 0x3d /* Center Y tool position */
#define ABS_MAX 0x3f #define ABS_MAX 0x3f
#define ABS_CNT (ABS_MAX+1) #define ABS_CNT (ABS_MAX+1)

1
src/include/memrange.h
View File

@ -82,7 +82,6 @@ static inline bool memranges_is_empty(const struct memranges *ranges)
#define memranges_each_entry(r, ranges) \ #define memranges_each_entry(r, ranges) \
for (r = (ranges)->entries; r != NULL; r = r->next) for (r = (ranges)->entries; r != NULL; r = r->next)
/* Initialize memranges structure providing an optional array of range_entry /* Initialize memranges structure providing an optional array of range_entry
* to use as the free list. Additionally, it accepts an align parameter that * to use as the free list. Additionally, it accepts an align parameter that
* represents the required alignment(log 2) of addresses. */ * represents the required alignment(log 2) of addresses. */

1
src/include/nhlt.h
View File

@ -219,7 +219,6 @@ enum {
SPEAKER_TOP_BACK_RIGHT = 1 << 17, SPEAKER_TOP_BACK_RIGHT = 1 << 17,
}; };
/* Supporting structures. Only SoC/chipset and the library code directly should /* Supporting structures. Only SoC/chipset and the library code directly should
* be manipulating these structures. */ * be manipulating these structures. */
struct sub_format { struct sub_format {

1
src/include/pc80/mc146818rtc.h
View File

@ -17,7 +17,6 @@
#define RTC_REG_C 12 #define RTC_REG_C 12
#define RTC_REG_D 13 #define RTC_REG_D 13
/********************************************************************** /**********************************************************************
* register details * register details
**********************************************************************/ **********************************************************************/

1
src/include/reg_script.h
View File

@ -355,7 +355,6 @@ struct reg_script_bus_entry {
#define REG_RES_XOR32(bar_, reg_, value_) \ #define REG_RES_XOR32(bar_, reg_, value_) \
REG_RES_RXW32(bar_, reg_, 0xffffffff, value_) REG_RES_RXW32(bar_, reg_, 0xffffffff, value_)
#if CONFIG(SOC_INTEL_BAYTRAIL) #if CONFIG(SOC_INTEL_BAYTRAIL)
/* /*
* IO Sideband Function * IO Sideband Function

3
src/include/smp/atomic.h
View File

@ -31,7 +31,6 @@ typedef struct { int counter; } atomic_t;
*/ */
#define atomic_set(v, i) (((v)->counter) = (i)) #define atomic_set(v, i) (((v)->counter) = (i))
/** /**
* atomic_inc - increment atomic variable * atomic_inc - increment atomic variable
* @param v: pointer of type atomic_t * @param v: pointer of type atomic_t
@ -41,7 +40,6 @@ typedef struct { int counter; } atomic_t;
*/ */
#define atomic_inc(v) (((v)->counter)++) #define atomic_inc(v) (((v)->counter)++)
/** /**
* atomic_dec - decrement atomic variable * atomic_dec - decrement atomic variable
* @param v: pointer of type atomic_t * @param v: pointer of type atomic_t
@ -51,7 +49,6 @@ typedef struct { int counter; } atomic_t;
*/ */
#define atomic_dec(v) (((v)->counter)--) #define atomic_dec(v) (((v)->counter)--)
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
#endif /* SMP_ATOMIC_H */ #endif /* SMP_ATOMIC_H */

1
src/include/spd.h
View File

@ -136,7 +136,6 @@
/* SDRAM Device Minimum Auto Refresh to Active/Auto Refresh (tRFC) */ /* SDRAM Device Minimum Auto Refresh to Active/Auto Refresh (tRFC) */
#define SPD_tRFC 42 #define SPD_tRFC 42
/* SPD_MEMORY_TYPE values. */ /* SPD_MEMORY_TYPE values. */
enum spd_memory_type { enum spd_memory_type {
SPD_MEMORY_TYPE_UNDEFINED = 0x00, SPD_MEMORY_TYPE_UNDEFINED = 0x00,