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soc/intel/meteorlake: Remove the check for INFR 

Remove the check to follow the new flow that commit 9c348a7b7e
("soc/intel/alderlake: Fix processor hang while plug unplug of
TBT device") introduced.

Processor hang is observed while hot plug unplug of TBT device. BIOS
should execute TBT PCIe RP RTD3 flow based on the value of
TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if
BIT30 in TBT FW version is not set.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ie822b8e1fd7592a31275db8455519c4cc6ac02ad
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77456
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Sean Rhodes 2023-08-25 13:55:39 +01:00 committed by Subrata Banik
parent 244a60ea44
commit 56b9ac2a64
1 changed files with 0 additions and 6 deletions
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6
src/soc/intel/meteorlake/acpi/tcss.asl
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@ -449,9 +449,6 @@ Scope (\_SB.PCI0)
Printf("TDM0 does not exist.")
} Else {
If (\_SB.PCI0.TDM0.STAT == 1) {
If (\_SB.PCI0.TDM0.INFR != 1) {
Return
}
/* DMA0 is not in D3Cold now. */
\_SB.PCI0.TDM0.D3CE() /* Enable DMA RTD3 */
@ -511,9 +508,6 @@ Scope (\_SB.PCI0)
Printf("TDM1 does not exist.")
} Else {
If (\_SB.PCI0.TDM1.STAT == 1) {
If (\_SB.PCI0.TDM1.INFR != 1) {
Return
}
/* DMA1 is not in D3Cold now */
\_SB.PCI0.TDM1.D3CE() /* Enable DMA RTD3. */