soc/mediatek/mt8186: Prevent early USB wakeup

The MT8186 platform fails to suspend due to premature wakeup by USB.

In MT8186, we use low level latch to keep USB wakeup signal. However,
hardware could latch a wrong signal if it debounces more than one time.
As a result, it would enable wakeup function too early.

To prevent this issue, we do the following modification:
- Delay about 100 us to enable wakeup function in kernel drivers [1].
- To guarantee 100 us is enough, we need to disable the USB debounce by
  default in coreboot.

According to section register 0x404 and 0x420 in
"(CODA) MT8169_PERICFG_REG.xls" which is only for MediaTek internal use:
The current default value of debounce register for MT8186 USB IP0 and
IP1 is incorrect. The reason we add in coreboot is that the default
value should be correct when SoC is booting up.

This modification is only for MT8186. The subsequent SoCs will adjust
the wakeup function to correct register value by default.

[1]: 0d8cfeeef3f5 (usb: xhci-mtk: fix random remote wakeup)

TEST=after stress test, not found premature wakeup by USB
BUG=b:228773975

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I296c4491c5959670a39fa8bd6ef987557bbc459f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63858
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/mediatek/mt8186/include/soc/addressmap.h

@@ -21,6 +21,7 @@ enum {
 	IOCFG_BL_BASE			= IO_PHYS + 0x00002600,
 	IOCFG_RB_BASE			= IO_PHYS + 0x00002A00,
 	IOCFG_RT_BASE			= IO_PHYS + 0x00002C00,
+	PERICFG_BASE			= IO_PHYS + 0x00003000,
 	GPIO_BASE			= IO_PHYS + 0x00005000,
 	SPM_BASE			= IO_PHYS + 0x00006000,
 	RGU_BASE			= IO_PHYS + 0x00007000,

src/soc/mediatek/mt8186/usb.c

@@ -10,7 +10,15 @@
 #include <soc/gpio.h>
 #include <soc/usb.h>
 
+#define PERI_USB_WAKEUP_DEC_CON1	0x404
+#define PERI_U3_WAKE_CTRL0		0x420
+
 void mtk_usb_prepare(void)
 {
 	gpio_output(GPIO(USB_DRVVBUS_P1), 1);
+
+	/* disable IP0 debounce */
+	write32p(PERICFG_BASE + PERI_U3_WAKE_CTRL0, 0);
+	/* disable IP1 debounce */
+	write32p(PERICFG_BASE + PERI_USB_WAKEUP_DEC_CON1, 0);
 }