cpu/x86/lapic: Refactor timer_fsb()
Common apic_timer code in cpu/x86 should not depend on intel header files. Change-Id: Ib099921d4b8e561daea47219385762bb00fc4548 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34091 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -11,12 +11,16 @@
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* GNU General Public License for more details.
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*/
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#include <arch/early_variables.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/msr.h>
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#include <cpu/intel/speedstep.h>
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#include <cpu/intel/fsb.h>
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#include <console/console.h>
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#include <commonlib/helpers.h>
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#include <delay.h>
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static u32 g_timer_fsb CAR_GLOBAL;
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static int get_fsb(void)
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{
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@ -67,16 +71,31 @@ static int get_fsb(void)
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return ret;
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}
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int get_ia32_fsb(void)
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static int set_timer_fsb(void)
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{
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int ret;
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int ret = get_fsb();
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ret = get_fsb();
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if (ret > 0) {
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car_set_var(g_timer_fsb, ret);
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return 0;
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}
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if (ret == -1)
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printk(BIOS_ERR, "FSB not found\n");
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if (ret == -2)
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printk(BIOS_ERR, "CPU not supported\n");
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return ret;
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return -1;
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}
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u32 get_timer_fsb(void)
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{
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u32 fsb;
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fsb = car_get_var(g_timer_fsb);
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if (fsb > 0)
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return fsb;
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set_timer_fsb();
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return car_get_var(g_timer_fsb);
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}
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/**
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@ -87,7 +106,7 @@ int get_ia32_fsb(void)
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*/
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int get_ia32_fsb_x3(void)
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{
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const int fsb = get_ia32_fsb();
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const int fsb = get_timer_fsb();
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if (fsb > 0)
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return 100 * DIV_ROUND_CLOSEST(3 * fsb, 100);
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@ -17,44 +17,8 @@
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#include <thread.h>
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#include <arch/cpu.h>
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#include <arch/early_variables.h>
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#include <cpu/intel/fsb.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/intel/speedstep.h>
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/* NOTE: This code uses global variables, so it can not be used during
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* memory init.
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*/
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#if CONFIG_UDELAY_LAPIC_FIXED_FSB != 0
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static inline u32 get_timer_fsb(void)
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{
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return CONFIG_UDELAY_LAPIC_FIXED_FSB;
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}
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static int set_timer_fsb(void)
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{
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return 0;
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}
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#else
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static u32 g_timer_fsb CAR_GLOBAL;
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static int set_timer_fsb(void)
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{
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int ia32_fsb = get_ia32_fsb();
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if (ia32_fsb > 0) {
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car_set_var(g_timer_fsb, ia32_fsb);
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return 0;
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}
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return -1;
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}
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static inline u32 get_timer_fsb(void)
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{
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return car_get_var(g_timer_fsb);
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}
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#endif
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void init_timer(void)
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{
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@ -66,9 +30,6 @@ void init_timer(void)
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/* Set the initial counter to 0xffffffff */
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lapic_write(LAPIC_TMICT, 0xffffffff);
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/* Set FSB frequency to a reasonable value */
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set_timer_fsb();
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}
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void udelay(u32 usecs)
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@ -15,15 +15,7 @@
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#define CPU_INTEL_FSB_H
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/*
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* This function returns:
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* the system bus speed value in MHz
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* -1 if FSB is not found
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* -2 if the CPU is not supported
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*/
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int get_ia32_fsb(void);
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/*
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* This function returns round up 3 * get_ia32_fsb()
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* This function returns round up 3 * get_timer_fsb()
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*/
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int get_ia32_fsb_x3(void);
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@ -1,6 +1,17 @@
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#ifndef DELAY_H
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#define DELAY_H
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#include <stdint.h>
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#if CONFIG_UDELAY_LAPIC_FIXED_FSB != 0
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static inline u32 get_timer_fsb(void)
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{
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return CONFIG_UDELAY_LAPIC_FIXED_FSB;
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}
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#else
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u32 get_timer_fsb(void);
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#endif
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void init_timer(void);
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void udelay(unsigned int usecs);
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