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mb/kontron/986lcd-m: Add gameport base allocation workaround 

A missing definition of gameport base (PNP io 0x60) will cause
an automatic address assignment during PCI/PNP enumeration, which
won't obey limit 0x7ff. This will cause the enumeration to fail
as other devices already have the values enabled.

The symptoms are: not working USB, PS/2, garbled UART console,
not working PCIe GPUs and crashes. Probably because of wrongly
assigned IO ports.

Example of log (shortened):

Done reading resources.
Setting resources...
!! Resource didn't fit !!
   aligned base 1000 size 1000 limit 2e7
   1fff needs to be <= 2e7 (limit)
   PCI: 00:1c.0 1c *  [0x0 - 0xfff] io
!! Resource didn't fit !!
   aligned base 1000 size 1000 limit 2e7
   1fff needs to be <= 2e7 (limit)
   PCI: 00:1c.1 1c *  [0x1000 - 0x1fff] io
!! Resource didn't fit !!
   aligned base 1000 size 1000 limit 2e7
   1fff needs to be <= 2e7 (limit)
   PCI: 00:1c.2 1c *  [0x2000 - 0x2fff] io
!! Resource didn't fit !!
   aligned base 400 size 10 limit 2e7
   40f needs to be <= 2e7 (limit)
   PCI: 00:1f.2 20 *  [0x3080 - 0x308f] io
!! Resource didn't fit !!
...
ERROR: PCI: 00:02.0 14 io size: 0x0000000008 not assigned
...
ERROR: PCI: 00:1f.2 10 io size: 0x0000000008 not assigned
ERROR: PCI: 00:1f.2 14 io size: 0x0000000004 not assigned
ERROR: PCI: 00:1f.2 18 io size: 0x0000000008 not assigned
ERROR: PCI: 00:1f.2 1c io size: 0x0000000004 not assigned
ERROR: PCI: 00:1f.2 20 io size: 0x0000000010 not assigned
...
PCI: 00:1b.0 subsystem <- 8086/27d8
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 8086/27d0
PCI: 00:1c.0 cmd <- 107
PCI: 00:1c.1 brids70c01mcu0PeC: 0
dV0i8s0immicrocode: upd10a00000y0025 x666600CPU physiaB 0 0 e k
MTRR cheaeu60zeAttemfWaiting for 1st Sot AP: slot 1 apic_L0ecl0zsax a
aInitiNntt kac:oIG0 Ua dUrSGSGL Ct0C07fintel_vga_int15_h
VGA Option ROM wa7..Azalia0Azalia: codkAbCiPCI: 00:1c.0 init finished

We can see the ports probably started to collide after the activation
of 00:1c.0 device. A debug run with compiled SPEW shows the problem
with enumeration:

PCI: 00:1f.1 18 *  [0x50b8 - 0x50bf] io
PCI: 00:1f.2 10 *  [0x50c0 - 0x50c7] io
PCI: 00:1f.2 18 *  [0x50c8 - 0x50cf] io
PCI: 00:1f.1 14 *  [0x50d0 - 0x50d3] io
PCI: 00:1f.1 1c *  [0x50d4 - 0x50d7] io
PCI: 00:1f.2 14 *  [0x50d8 - 0x50db] io
PCI: 00:1f.2 1c *  [0x50dc - 0x50df] io
PNP: 002e.7 60 *  [0x50e0 - 0x50e0] io		<-- gameport base
DOMAIN: 0000 io: base: 50e1 size: 40e1 align: 12 gran: 0 limit: 7ff done

Notice a weird base for DOMAIN, along with the limit.

Adding a definition of gameport (0x220) as a workaround fixes
the problems.

The gameport should be still disabled thanks to disable bits
(W83627THF datasheet is little bit chaotic). I didn't find any info
if the gameport is available on some pads of the motherboard.

Signed-off-by: Petr Cvek <petrcvekcz@gmail.com>
Change-Id: Ie8e42552ac5e638e91e5c290655edcce1f64e408
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Petr Cvek 2019-09-29 01:26:12 +02:00 committed by Patrick Georgi
parent 2647b6f9ba
commit 5adbc767f6
1 changed files with 1 additions and 0 deletions
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1
src/mainboard/kontron/986lcd-m/devicetree.cb
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@ -79,6 +79,7 @@ chip northbridge/intel/i945
irq 0xf0 = 0x82 # HW accel A20.
end
device pnp 2e.7 on # GPIO1, GAME, MIDI
io 0x60 = 0x220 # allocator workaround
io 0x62 = 0x330
irq 0x70 = 9
end