soc/amd/mendocino/data_fabric: add Rembrandt DF_MMIO_REG_SET_SIZE

In contrast to Mendocino and all other AMD SoCs in the coreboot tree,
Rembrandt, on which Mendocino is based on, has a DF_MMIO_REG_SET_SIZE of
3 instead of 4, so the next data fabric MMIO register is 3 DWORDs after
the last one instead of the 4 DWORDs on the other SoCs. This was checked
against PPR #56558 Rev 3.04.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I454ad5d182f0040db93c9b3a83941333392c6061
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72879
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>

src/soc/amd/mendocino/include/soc/data_fabric.h

@@ -11,7 +11,12 @@
 #define   D18F0_MMIO_SHIFT		16
 #define D18F0_MMIO_CTRL0		0x208
 
+#if CONFIG(SOC_AMD_REMBRANDT)
+#define DF_MMIO_REG_SET_SIZE		3
+#else
 #define DF_MMIO_REG_SET_SIZE		4
+#endif
+
 #define DF_MMIO_REG_SET_COUNT		8
 
 #define DF_FICAA_BIOS			0x5C