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LUMPY: Add information to generate MPTABLE from devicetree.cb 

Change-Id: If68888e87c5197328c59dafce1301eefe000e28e
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1462
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Sven Schnelle 2012-08-20 11:21:00 +02:00
parent fee73df07a
commit 5be2060e09
2 changed files with 33 additions and 6 deletions
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2
src/mainboard/samsung/lumpy/Kconfig
View File

@ -12,12 +12,14 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select GFXUMA
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_MP_TABLE
select HAVE_OPTION_TABLE
select HAVE_SMI_HANDLER
select MMCONF_SUPPORT
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select SOUTHBRIDGE_INTEL_BD82X6X
select SUPERIO_SMSC_MEC1308
select DRIVERS_GENERIC_IOAPIC
config MAINBOARD_DIR
string

37
src/mainboard/samsung/lumpy/devicetree.cb
View File

@ -33,6 +33,10 @@ chip northbridge/intel/sandybridge
end
device pci_domain 0 on
ioapic_irq 4 INTA 0x10
ioapic_irq 4 INTB 0x11
ioapic_irq 4 INTC 0x12
ioapic_irq 4 INTD 0x13
subsystemid 0x1ae0 0xc000 inherit
device pci 00.0 on end # host bridge
device pci 02.0 on end # vga controller
@ -68,19 +72,28 @@ chip northbridge/intel/sandybridge
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT
device pci 19.0 off end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio
device pci 1a.0 on # USB2 EHCI #2
ioapic_irq 4 INTA 0x11
end
device pci 1b.0 on # High Definition Audio
ioapic_irq 4 INTA 0x16
end
device pci 1c.0 on end # PCIe Port #1 (WLAN)
device pci 1c.1 off end # PCIe Port #2
device pci 1c.2 off end # PCIe Port #3
device pci 1c.3 on end # PCIe Port #4 (LAN)
device pci 1c.3 on # PCIe Port #4 (LAN)
# ioapic_irq 4 INTA 0x13
end
device pci 1c.4 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1
device pci 1d.0 on # USB2 EHCI #1
ioapic_irq 4 INTA 0x13
end
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge
ioapic_irq 4 INTA 0x10
chip superio/smsc/mec1308
device pnp 2e.1 on # PM1
io 0x60 = 0xb00
@ -102,9 +115,21 @@ chip northbridge/intel/sandybridge
register "mailbox_port" = "0xa00"
device pnp ff.1 off end
end
chip drivers/generic/ioapic
register "have_isa_interrupts" = "1"
register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
register "base" = "0xfec00000"
device ioapic 4 on end
end
end
device pci 1f.2 on # SATA Controller 1
ioapic_irq 4 INTA 0x10
end
device pci 1f.3 on # SMBus
ioapic_irq 4 INTC 0x17
end
device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 on end # Thermal
end