soc/amd/phoenix/xhci: add SCI sources for the two USB4 controllers
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I95916e409b3fbd4941a861054733a34100244da9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74657 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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@ -1,7 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* TODO: Update for Phoenix */
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#include <amdblocks/gpio.h>
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#include <amdblocks/smi.h>
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#include <amdblocks/xhci.h>
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@ -24,6 +22,18 @@ static const struct sci_source xhci_sci_sources[] = {
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.gpe = XHCI_GEVENT,
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.direction = SMI_SCI_LVL_HIGH,
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.level = SMI_SCI_EDG
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},
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{
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.scimap = SMITYPE_XHC3_PME,
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.gpe = XHCI_GEVENT,
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.direction = SMI_SCI_LVL_HIGH,
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.level = SMI_SCI_EDG
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},
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{
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.scimap = SMITYPE_XHC4_PME,
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.gpe = XHCI_GEVENT,
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.direction = SMI_SCI_LVL_HIGH,
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.level = SMI_SCI_EDG
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}
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};
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@ -45,6 +55,16 @@ enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
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}
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}
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if (dev->bus->dev->path.pci.devfn == PCIE_ABC_C_DEVFN) {
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if (dev->path.pci.devfn == USB4_XHCI0_DEVFN) {
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*gpe = xhci_sci_sources[2].gpe;
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return CB_SUCCESS;
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} else if (dev->path.pci.devfn == USB4_XHCI1_DEVFN) {
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*gpe = xhci_sci_sources[3].gpe;
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return CB_SUCCESS;
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}
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}
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return CB_ERR_ARG;
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}
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