soc/mediatek/mt8195: add apusys init flow

Set up APU mbox's functional configuration registers.

BUG=b:203145462
BRANCH=cherry
TEST=boot cherry correctly

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: I5053d5e1f1c2286c9dce280ff83e8b8611b573b9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58794
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Flora Fu 2021-06-25 23:27:56 +08:00 committed by Hung-Te Lin
parent b44202b29a
commit 5cd1871929
5 changed files with 66 additions and 0 deletions

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@ -22,6 +22,7 @@ verstage-y += ../common/timer.c timer.c
verstage-y += ../common/uart.c
verstage-y += ../common/wdt.c
ramstage-y += apusys.c
romstage-y += ../common/auxadc.c
romstage-y += ../common/cbmem.c
romstage-y += ../common/clkbuf.c

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@ -0,0 +1,31 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <device/mmio.h>
#include <soc/apusys.h>
/* MBOX Functional Configuration */
DEFINE_BITFIELD(LOCK, 0, 0)
DEFINE_BITFIELD(NO_MPU, 16, 16)
static void dump_apusys_reg(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(mt8195_apu_mbox); i++) {
printk(BIOS_INFO, "APU_MBOX %p = %#x\n",
(void *)&mt8195_apu_mbox[i]->mbox_func_cfg,
read32(&mt8195_apu_mbox[i]->mbox_func_cfg));
}
}
void apusys_init(void)
{
int i;
/* Setup MBOX MPU for non secure access */
for (i = 0; i < ARRAY_SIZE(mt8195_apu_mbox); i++)
SET32_BITFIELDS(&mt8195_apu_mbox[i]->mbox_func_cfg, NO_MPU, 1, LOCK, 1);
dump_apusys_reg();
}

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@ -80,6 +80,7 @@ enum {
IOCFG_RB_BASE = IO_PHYS + 0x01EB0000,
IOCFG_TL_BASE = IO_PHYS + 0x01F40000,
MSDC0_TOP_BASE = IO_PHYS + 0x01F50000,
APU_MBOX_BASE = IO_PHYS + 0x09000000,
DISP_OVL0_BASE = IO_PHYS + 0x0C000000,
DISP_RDMA0_BASE = IO_PHYS + 0x0C002000,
DISP_COLOR0_BASE = IO_PHYS + 0x0C003000,

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@ -0,0 +1,31 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef SOC_MEDIATEK_MT8195_APUSYS_H
#define SOC_MEDIATEK_MT8195_APUSYS_H
#include <soc/addressmap.h>
#include <types.h>
struct mt8195_apu_mbox_regs {
u32 mbox_in[8];
u32 mbox_out[8];
u32 mbox_reserved1[28];
u32 mbox_func_cfg;
u32 mbox0_reserved2[19];
};
check_member(mt8195_apu_mbox_regs, mbox_func_cfg, 0x0b0);
static struct mt8195_apu_mbox_regs * const mt8195_apu_mbox[] = {
(void *)APU_MBOX_BASE,
(void *)(APU_MBOX_BASE + 0x100),
(void *)(APU_MBOX_BASE + 0x200),
(void *)(APU_MBOX_BASE + 0x300),
(void *)(APU_MBOX_BASE + 0x400),
(void *)(APU_MBOX_BASE + 0x500),
(void *)(APU_MBOX_BASE + 0x600),
(void *)(APU_MBOX_BASE + 0x700),
};
void apusys_init(void);
#endif /* SOC_MEDIATEK_MT8195_APUSYS_H */

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@ -2,6 +2,7 @@
#include <bootmem.h>
#include <device/device.h>
#include <soc/apusys.h>
#include <soc/devapc.h>
#include <soc/dfd.h>
#include <soc/emi.h>
@ -28,6 +29,7 @@ static void soc_init(struct device *dev)
{
mtk_mmu_disable_l2c_sram();
dapc_init();
apusys_init();
mcupm_init();
sspm_init();