soc/mediatek/mt8195: add apusys init flow
Set up APU mbox's functional configuration registers. BUG=b:203145462 BRANCH=cherry TEST=boot cherry correctly Signed-off-by: Flora Fu <flora.fu@mediatek.com> Change-Id: I5053d5e1f1c2286c9dce280ff83e8b8611b573b9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58794 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -22,6 +22,7 @@ verstage-y += ../common/timer.c timer.c
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verstage-y += ../common/uart.c
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verstage-y += ../common/wdt.c
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ramstage-y += apusys.c
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romstage-y += ../common/auxadc.c
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romstage-y += ../common/cbmem.c
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romstage-y += ../common/clkbuf.c
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@ -0,0 +1,31 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/mmio.h>
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#include <soc/apusys.h>
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/* MBOX Functional Configuration */
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DEFINE_BITFIELD(LOCK, 0, 0)
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DEFINE_BITFIELD(NO_MPU, 16, 16)
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static void dump_apusys_reg(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(mt8195_apu_mbox); i++) {
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printk(BIOS_INFO, "APU_MBOX %p = %#x\n",
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(void *)&mt8195_apu_mbox[i]->mbox_func_cfg,
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read32(&mt8195_apu_mbox[i]->mbox_func_cfg));
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}
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}
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void apusys_init(void)
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{
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int i;
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/* Setup MBOX MPU for non secure access */
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for (i = 0; i < ARRAY_SIZE(mt8195_apu_mbox); i++)
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SET32_BITFIELDS(&mt8195_apu_mbox[i]->mbox_func_cfg, NO_MPU, 1, LOCK, 1);
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dump_apusys_reg();
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}
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@ -80,6 +80,7 @@ enum {
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IOCFG_RB_BASE = IO_PHYS + 0x01EB0000,
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IOCFG_TL_BASE = IO_PHYS + 0x01F40000,
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MSDC0_TOP_BASE = IO_PHYS + 0x01F50000,
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APU_MBOX_BASE = IO_PHYS + 0x09000000,
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DISP_OVL0_BASE = IO_PHYS + 0x0C000000,
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DISP_RDMA0_BASE = IO_PHYS + 0x0C002000,
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DISP_COLOR0_BASE = IO_PHYS + 0x0C003000,
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@ -0,0 +1,31 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SOC_MEDIATEK_MT8195_APUSYS_H
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#define SOC_MEDIATEK_MT8195_APUSYS_H
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#include <soc/addressmap.h>
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#include <types.h>
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struct mt8195_apu_mbox_regs {
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u32 mbox_in[8];
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u32 mbox_out[8];
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u32 mbox_reserved1[28];
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u32 mbox_func_cfg;
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u32 mbox0_reserved2[19];
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};
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check_member(mt8195_apu_mbox_regs, mbox_func_cfg, 0x0b0);
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static struct mt8195_apu_mbox_regs * const mt8195_apu_mbox[] = {
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(void *)APU_MBOX_BASE,
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(void *)(APU_MBOX_BASE + 0x100),
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(void *)(APU_MBOX_BASE + 0x200),
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(void *)(APU_MBOX_BASE + 0x300),
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(void *)(APU_MBOX_BASE + 0x400),
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(void *)(APU_MBOX_BASE + 0x500),
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(void *)(APU_MBOX_BASE + 0x600),
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(void *)(APU_MBOX_BASE + 0x700),
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};
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void apusys_init(void);
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#endif /* SOC_MEDIATEK_MT8195_APUSYS_H */
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@ -2,6 +2,7 @@
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#include <bootmem.h>
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#include <device/device.h>
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#include <soc/apusys.h>
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#include <soc/devapc.h>
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#include <soc/dfd.h>
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#include <soc/emi.h>
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@ -28,6 +29,7 @@ static void soc_init(struct device *dev)
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{
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mtk_mmu_disable_l2c_sram();
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dapc_init();
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apusys_init();
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mcupm_init();
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sspm_init();
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