soc/mediatek/mt8186: Initialize watchdog

MT8186 requires writing speical value to mode register to clear
status register. The flow of clear status is different from other
platforms, so we override mtk_wdt_clr_status() for MT8186.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I290b69573a8e58db76814e16b5c17c23413f1108
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58835
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Rex-BC Chen 2021-09-27 13:49:15 +08:00 committed by Felix Held
parent a23d76a8bc
commit 5db9fa7433
4 changed files with 24 additions and 0 deletions

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@ -6,6 +6,7 @@ config SOC_MEDIATEK_MT8186
select ARCH_ROMSTAGE_ARMV8_64 select ARCH_ROMSTAGE_ARMV8_64
select ARCH_RAMSTAGE_ARMV8_64 select ARCH_RAMSTAGE_ARMV8_64
select HAVE_UART_SPECIAL select HAVE_UART_SPECIAL
select SOC_MEDIATEK_COMMON
if SOC_MEDIATEK_MT8186 if SOC_MEDIATEK_MT8186

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@ -5,22 +5,26 @@ bootblock-y += ../common/mmu_operations.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-y += ../common/timer.c bootblock-y += ../common/timer.c
bootblock-y += ../common/uart.c bootblock-y += ../common/uart.c
bootblock-y += ../common/wdt.c wdt.c
verstage-$(CONFIG_SPI_FLASH) += spi.c verstage-$(CONFIG_SPI_FLASH) += spi.c
verstage-y += ../common/timer.c verstage-y += ../common/timer.c
verstage-y += ../common/uart.c verstage-y += ../common/uart.c
verstage-y += ../common/wdt.c wdt.c
romstage-y += ../common/cbmem.c romstage-y += ../common/cbmem.c
romstage-y += emi.c romstage-y += emi.c
romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-$(CONFIG_SPI_FLASH) += spi.c
romstage-y += ../common/timer.c romstage-y += ../common/timer.c
romstage-y += ../common/uart.c romstage-y += ../common/uart.c
romstage-y += ../common/wdt.c wdt.c
ramstage-y += emi.c ramstage-y += emi.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-y += soc.c ramstage-y += soc.c
ramstage-y += ../common/timer.c ramstage-y += ../common/timer.c
ramstage-y += ../common/uart.c ramstage-y += ../common/uart.c
ramstage-y += ../common/wdt.c wdt.c
CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include

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@ -2,8 +2,10 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <soc/mmu_operations.h> #include <soc/mmu_operations.h>
#include <soc/wdt.h>
void bootblock_soc_init(void) void bootblock_soc_init(void)
{ {
mtk_mmu_init(); mtk_mmu_init();
mtk_wdt_init();
} }

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@ -0,0 +1,17 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* This file is created based on MT8186 Functional Specification
* Chapter number: 3.4
*/
#include <device/mmio.h>
#include <soc/addressmap.h>
#include <soc/wdt.h>
#define MTK_WDT_CLR_STATUS 0x22000000
void mtk_wdt_clr_status(uint32_t wdt_sta)
{
write32(&mtk_wdt->wdt_mode, wdt_sta | MTK_WDT_CLR_STATUS);
}