soc/mediatek/mt8186: Initialize watchdog
MT8186 requires writing speical value to mode register to clear status register. The flow of clear status is different from other platforms, so we override mtk_wdt_clr_status() for MT8186. TEST=build pass BUG=b:202871018 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I290b69573a8e58db76814e16b5c17c23413f1108 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58835 Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -6,6 +6,7 @@ config SOC_MEDIATEK_MT8186
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select ARCH_ROMSTAGE_ARMV8_64
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select ARCH_ROMSTAGE_ARMV8_64
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select ARCH_RAMSTAGE_ARMV8_64
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select ARCH_RAMSTAGE_ARMV8_64
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select HAVE_UART_SPECIAL
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select HAVE_UART_SPECIAL
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select SOC_MEDIATEK_COMMON
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if SOC_MEDIATEK_MT8186
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if SOC_MEDIATEK_MT8186
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@ -5,22 +5,26 @@ bootblock-y += ../common/mmu_operations.c
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bootblock-$(CONFIG_SPI_FLASH) += spi.c
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bootblock-$(CONFIG_SPI_FLASH) += spi.c
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bootblock-y += ../common/timer.c
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bootblock-y += ../common/timer.c
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bootblock-y += ../common/uart.c
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bootblock-y += ../common/uart.c
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bootblock-y += ../common/wdt.c wdt.c
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verstage-$(CONFIG_SPI_FLASH) += spi.c
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verstage-$(CONFIG_SPI_FLASH) += spi.c
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verstage-y += ../common/timer.c
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verstage-y += ../common/timer.c
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verstage-y += ../common/uart.c
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verstage-y += ../common/uart.c
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verstage-y += ../common/wdt.c wdt.c
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romstage-y += ../common/cbmem.c
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romstage-y += ../common/cbmem.c
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romstage-y += emi.c
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romstage-y += emi.c
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romstage-$(CONFIG_SPI_FLASH) += spi.c
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romstage-$(CONFIG_SPI_FLASH) += spi.c
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romstage-y += ../common/timer.c
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romstage-y += ../common/timer.c
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romstage-y += ../common/uart.c
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romstage-y += ../common/uart.c
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romstage-y += ../common/wdt.c wdt.c
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ramstage-y += emi.c
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ramstage-y += emi.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-y += soc.c
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ramstage-y += soc.c
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ramstage-y += ../common/timer.c
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ramstage-y += ../common/timer.c
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ramstage-y += ../common/uart.c
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ramstage-y += ../common/uart.c
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ramstage-y += ../common/wdt.c wdt.c
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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@ -2,8 +2,10 @@
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#include <bootblock_common.h>
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#include <bootblock_common.h>
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#include <soc/mmu_operations.h>
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#include <soc/mmu_operations.h>
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#include <soc/wdt.h>
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void bootblock_soc_init(void)
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void bootblock_soc_init(void)
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{
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{
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mtk_mmu_init();
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mtk_mmu_init();
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mtk_wdt_init();
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}
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}
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@ -0,0 +1,17 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* This file is created based on MT8186 Functional Specification
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* Chapter number: 3.4
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*/
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#include <device/mmio.h>
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#include <soc/addressmap.h>
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#include <soc/wdt.h>
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#define MTK_WDT_CLR_STATUS 0x22000000
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void mtk_wdt_clr_status(uint32_t wdt_sta)
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{
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write32(&mtk_wdt->wdt_mode, wdt_sta | MTK_WDT_CLR_STATUS);
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}
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