soc/intel/common/timer: Fix cosmetic errors as per CB:35148 review

BUG=b:139798422, b:129839774
TEST=Able to build and boot KBL/CML/ICL.

Change-Id: I341eec13d275504545511904db0acd23ad34e940
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35234
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2019-09-03 11:50:06 +05:30
parent 1a29f4aeeb
commit 5dee36464e
1 changed files with 2 additions and 2 deletions

View File

@ -38,7 +38,7 @@ static unsigned int get_max_cpuid_func(void)
static unsigned long get_hardcoded_crystal_freq(void)
{
unsigned int core_crystal_nominal_freq_khz;
unsigned long core_crystal_nominal_freq_khz = 0;
/*
* Denverton SoCs don't report crystal clock, and also don't support
@ -70,7 +70,7 @@ static unsigned long get_hardcoded_crystal_freq(void)
*/
static unsigned long calculate_tsc_freq_from_core_crystal(void)
{
unsigned int core_crystal_nominal_freq_khz;
unsigned long core_crystal_nominal_freq_khz;
struct cpuid_result cpuidr_15h;
if (get_max_cpuid_func() < 0x15)