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- Modify the code to C style indenting. 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Eric Biederman 2003-10-03 02:53:02 +00:00
parent fae510cd84
commit 5ebf4d3431
3 changed files with 469 additions and 455 deletions
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12
src/mainboard/via/epia/auto.c
View File

@ -13,7 +13,8 @@
#include "northbridge/via/vt8601/raminit.h"
/*
*/
void udelay(int usecs) {
void udelay(int usecs)
{
int i;
for(i = 0; i < usecs; i++)
outb(i&0xff, 0x80);
@ -52,8 +53,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "sdram/generic_sdram.c"
*/
static void
enable_mainboard_devices(void) {
static void enable_mainboard_devices(void)
{
device_t dev;
/* dev 0 for southbridge */
@ -80,8 +81,8 @@ enable_mainboard_devices(void) {
pci_write_config8(dev, 0x42, 0);
}
static void
enable_shadow_ram(void) {
static void enable_shadow_ram(void)
{
device_t dev = 0; /* no need to look up 0:0.0 */
unsigned char shadowreg;
/* dev 0 for southbridge */
@ -90,6 +91,7 @@ enable_shadow_ram(void) {
shadowreg |= 0x30;
pci_write_config8(dev, 0x63, shadowreg);
}
static void main(void)
{
unsigned long x;

36
src/northbridge/via/vt8601/raminit.c
View File

@ -47,7 +47,8 @@ it with the version available from LANL.
#define DIMM_CL2 0
#endif
void dimms_read(unsigned long x) {
void dimms_read(unsigned long x)
{
uint8_t c;
unsigned long eax;
volatile unsigned long y;
@ -62,7 +63,8 @@ void dimms_read(unsigned long x) {
}
}
void dimms_write(int x) {
void dimms_write(int x)
{
uint8_t c;
unsigned long eax = x;
for(c = 0; c < 6; c++) {
@ -77,7 +79,8 @@ void dimms_write(int x) {
#ifdef DEBUG_SETNORTHB
void setnorthb(device_t north, uint8_t reg, uint8_t val) {
void setnorthb(device_t north, uint8_t reg, uint8_t val)
{
print_err("setnorth: reg ");
print_err_hex8(reg);
print_err(" to ");
@ -90,7 +93,8 @@ void setnorthb(device_t north, uint8_t reg, uint8_t val) {
#endif
void
dumpnorth(device_t north) {
dumpnorth(device_t north)
{
uint8_t r, c;
for(r = 0; r < 256; r += 16) {
print_err_hex8(r);
@ -102,7 +106,9 @@ dumpnorth(device_t north) {
print_err("\r\n");
}
}
static void sdram_set_registers(const struct mem_controller *ctrl) {
static void sdram_set_registers(const struct mem_controller *ctrl)
{
static const uint16_t raminit_ma_reg_table[] = {
/* Values for MA type register to try */
0x0000, 0x8088, 0xe0ee,
@ -194,10 +200,13 @@ static void sdram_set_registers(const struct mem_controller *ctrl) {
/* slot is the dram slot. Base is the *8M base. */
static unsigned char
do_module_size(unsigned char slot) { /*, unsigned char base) */
static const unsigned char log2[256] = {[1] = 0, [2] = 1, [4] = 2, [8] = 3,
do_module_size(unsigned char slot /*, unsigned char base) */)
{
static const unsigned char log2[256] = {
[1] = 0, [2] = 1, [4] = 2, [8] = 3,
[16]=4, [32]=5, [64]=6,
[128]=7};
[128]=7
};
static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
0x56, 0x57};
device_t north = 0;
@ -243,7 +252,8 @@ do_module_size(unsigned char slot) { /*, unsigned char base) */
return value;
}
static void sdram_set_spd_registers(const struct mem_controller *ctrl) {
static void sdram_set_spd_registers(const struct mem_controller *ctrl)
{
#define T133 7
unsigned char Trp = 1, Tras = 1, casl = 2, val;
unsigned char timing = 0xe4;
@ -269,15 +279,17 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) {
*/
}
static void sdram_enable(int controllers, const struct mem_controller *ctrl) {
static void sdram_enable(int controllers, const struct mem_controller *ctrl)
{
unsigned char i;
static const uint16_t raminit_ma_reg_table[] = {
/* Values for MA type register to try */
0x0000, 0x8088, 0xe0ee,
0xffff // end mark
};
static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
0x56, 0x57};
static const uint8_t ramregs[] = {
0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x56, 0x57
};
device_t north = 0;
uint8_t c, r, base;