soc/amd/common/block/psp/psp_gen2: move CORE_2_PSP_MSG_38 defines
CORE_2_PSP_MSG_38_OFFSET and CORE_2_PSP_MSG_38_FUSE_SPL are only used in psp_gen2.c, so move them into this file. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I67cc2ff63d1c0322b514521975f3ce0f9b1cf5b1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64011 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
parent
b470361e02
commit
5f772a6ed3
|
@ -26,9 +26,6 @@
|
|||
#define MBOX_BIOS_CMD_SMU_FW 0x19
|
||||
#define MBOX_BIOS_CMD_SMU_FW2 0x1a
|
||||
|
||||
#define CORE_2_PSP_MSG_38_OFFSET 0x10998
|
||||
#define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12)
|
||||
|
||||
/* command/response format, BIOS builds this in memory
|
||||
* mbox_buffer_header: generic header
|
||||
* mbox_buffer: command-specific buffer format
|
||||
|
|
|
@ -13,6 +13,9 @@
|
|||
#define PSP_MAILBOX_COMMAND_OFFSET 0x10570 /* 4 bytes */
|
||||
#define PSP_MAILBOX_BUFFER_OFFSET 0x10574 /* 8 bytes */
|
||||
|
||||
#define CORE_2_PSP_MSG_38_OFFSET 0x10998 /* 4 byte */
|
||||
#define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12)
|
||||
|
||||
union pspv2_mbox_command {
|
||||
u32 val;
|
||||
struct pspv2_mbox_cmd_fields {
|
||||
|
|
Loading…
Reference in New Issue