soc/intel/jasperlake: Move tco_configure to bootblock
Similar to CB:43313 (SHA bb50c67227
), it seems possible for the same
problem to come up on jasperlake. Again, it should be harmless to
configure the TCO device earlier in the boot flow.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: If95e46124660b4ed457434f727c9f9f7b02b0327
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43539
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
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commit
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@ -2,6 +2,7 @@
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#include <bootblock_common.h>
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#include <bootblock_common.h>
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#include <intelblocks/systemagent.h>
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#include <intelblocks/systemagent.h>
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#include <intelblocks/tco.h>
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#include <intelblocks/uart.h>
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#include <intelblocks/uart.h>
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#include <soc/bootblock.h>
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#include <soc/bootblock.h>
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@ -25,4 +26,7 @@ void bootblock_soc_init(void)
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{
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{
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report_platform_info();
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report_platform_info();
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pch_init();
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pch_init();
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/* Programming TCO_BASE_ADDRESS and TCO Timer Halt */
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tco_configure();
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}
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}
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@ -1,14 +1,10 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <intelblocks/smbus.h>
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#include <intelblocks/smbus.h>
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#include <intelblocks/tco.h>
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#include <soc/romstage.h>
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#include <soc/romstage.h>
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void pch_init(void)
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void pch_init(void)
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{
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{
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/* Programming TCO_BASE_ADDRESS and TCO Timer Halt */
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tco_configure();
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/* Program SMBUS_BASE_ADDRESS and Enable it */
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/* Program SMBUS_BASE_ADDRESS and Enable it */
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smbus_common_init();
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smbus_common_init();
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}
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}
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