mb/google/corsola: Fix ANX7625 power-on T4 sequence

The T4 of ANX7625 power on sequence should be larger than 0ms, but it's
-59ms now. So add 70ms delay between DSI_TE and LCM_RST.

BUG=b:242352915
TEST=The sequence T4 is larger than 0ms when power on.

Change-Id: I6b888707ec3c0612e396564e77c4cdbe92614dc5
Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67315
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

src/mainboard/google/corsola/display.c

@@ -82,7 +82,7 @@ static void bridge_anx7625_power_on(void)
 	gpio_output(GPIO_EN_PP3300_EDPBRDG, 1);
 	mdelay(14);
 	gpio_output(GPIO_EDPBRDG_PWREN, 1);
-	mdelay(10);
+	mdelay(80);
 	gpio_output(GPIO_EDPBRDG_RST_L, 1);
 }