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soc/amd/phoenix: Disable CCP DMA in PSP Verstage 

Some stalls are observed while using CCP DMA in PSP verstage -
especially with CBFS verification enabled. Also with RW CBFS
verification enabled, the entire firmware body is not loaded during
verstage for verification. Instead the files are verified as and when
they are loaded from CBFS. Hence the impact to boot time is reduced
since only few files are loaded during PSP verstage. Hence disable CCP
DMA in PSP verstage until the root cause is identified.

BUG=None
TEST=Build and boot to OS in Myst with CBFS verification enabled.

Change-Id: I22ac108b08abcfe432dfd175644393e384888e11
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78234
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Karthikeyan Ramasubramanian 2023-10-04 17:50:52 -06:00 committed by Martin L Roth
parent 244e3ffcbc
commit 637a21e27b
1 changed files with 2 additions and 1 deletions
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3
src/soc/amd/phoenix/Kconfig
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@ -25,7 +25,8 @@ config SOC_AMD_PHOENIX
select PLATFORM_USES_FSP2_0
select PROVIDES_ROM_SHARING
select PSP_SUPPORTS_EFS2_RELATIVE_ADDR if VBOOT_STARTS_BEFORE_BOOTBLOCK
select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK
# TODO: (b/303516266) Re-enable CCP DMA after addressing a stall
# select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK
select RESET_VECTOR_IN_RAM
select RTC
select SOC_AMD_COMMON