mb/google/octopus/variants/baseboard: Set PL1 and PL2 value
This patch sets PL1 value to ~6W. Here, 8W setting gives a run-time 6W actual measured power. Also, this patch sets PL2 value to 15W. BUG=None BRANCH=None TEST=Build and read the MSR 0x610. Change-Id: I2439a49b9917db0d9b05f333ce1c35003da493f6 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/25341 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -33,6 +33,13 @@ chip soc/intel/apollolake
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register "gpe0_dw2" = "PMC_GPE_N_95_64"
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register "gpe0_dw3" = "PMC_GPE_NW_31_0"
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# PL1 override 8000 mW: Due to error in the energy calculation for
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# current VR solution. Experiments show that SoC TDP max (6W) can
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# be reached when RAPL PL1 is set to 8W.
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register "tdp_pl1_override_mw" = "8000"
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# Set RAPL PL2 to 15W.
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register "tdp_pl2_override_mw" = "15000"
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# Minimum SLP S3 assertion width 28ms.
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register "slp_s3_assertion_width_usecs" = "28000"
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