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soc/intel/xeon_sp: rework lock_pam0123() to accomodate hidden SAD device 

For Intel SPR-SP, the SAD device is hidden, so pcidev_path_on_bus()
returns NULL. Therefore use pci_s_write_config32() instead.

Move lock_pam0123() from finalize.c to util.c, to be together with
unlock_pam_regions().

Change-Id: Ib08d423d8c4d482612077b66dab3878018da8f2b
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72432
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Jonathan Zhang 2023-01-24 11:18:15 -08:00 committed by Felix Held
parent ca520a726a
commit 665d870244
3 changed files with 17 additions and 11 deletions
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11
src/soc/intel/xeon_sp/finalize.c
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@ -16,17 +16,6 @@
#include "chip.h" #include "chip.h"
static void lock_pam0123(void)
{
const struct device *dev;
if (get_lockdown_config() != CHIPSET_LOCKDOWN_COREBOOT)
return;
dev = pcidev_path_on_bus(get_stack_busno(1), PCI_DEVFN(SAD_ALL_DEV, SAD_ALL_FUNC));
pci_or_config32(dev, SAD_ALL_PAM0123_CSR, PAM_LOCK);
}
DECLARE_SPIN_LOCK(msr_ppin_lock); DECLARE_SPIN_LOCK(msr_ppin_lock);
static void lock_msr_ppin_ctl(void *unused) static void lock_msr_ppin_ctl(void *unused)

2
src/soc/intel/xeon_sp/include/soc/util.h
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@ -6,7 +6,9 @@
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <hob_iiouds.h> #include <hob_iiouds.h>
void lock_pam0123(void);
void unlock_pam_regions(void); void unlock_pam_regions(void);
msr_t read_msr_ppin(void); msr_t read_msr_ppin(void);
int get_platform_thread_count(void); int get_platform_thread_count(void);
const IIO_UDS *get_iio_uds(void); const IIO_UDS *get_iio_uds(void);

15
src/soc/intel/xeon_sp/util.c
View File

@ -6,13 +6,28 @@
#include <delay.h> #include <delay.h>
#include <device/device.h> #include <device/device.h>
#include <device/pci.h> #include <device/pci.h>
#include <intelblocks/cfg.h>
#include <intelblocks/cpulib.h> #include <intelblocks/cpulib.h>
#include <intelpch/lockdown.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
#include <soc/msr.h> #include <soc/msr.h>
#include <soc/soc_util.h> #include <soc/soc_util.h>
#include <soc/util.h> #include <soc/util.h>
#include <timer.h> #include <timer.h>
void lock_pam0123(void)
{
if (get_lockdown_config() != CHIPSET_LOCKDOWN_COREBOOT)
return;
/* section 16.3.19 of Intel doc. #612246 */
uint32_t pam0123_lock = 0x33333331;
uint32_t bus1 = get_socket_ubox_busno(0);
pci_s_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC),
SAD_ALL_PAM0123_CSR, pam0123_lock);
}
void unlock_pam_regions(void) void unlock_pam_regions(void)
{ {
uint32_t pam0123_unlock_dram = 0x33333330; uint32_t pam0123_unlock_dram = 0x33333330;