Kconfig:
- Add AMD Socket 754, - Fix MCP55 boards (romstrap) - Implement remaining MSI boards Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4732 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi
parent
31f81a6de1
commit
66b74047d6
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@ -2,7 +2,7 @@ config K8_REV_F_SUPPORT
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bool
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default n
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#source src/cpu/amd/socket_754/Kconfig
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source src/cpu/amd/socket_754/Kconfig
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#source src/cpu/amd/socket_939/Kconfig
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source src/cpu/amd/socket_940/Kconfig
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source src/cpu/amd/socket_AM2/Kconfig
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@ -1,4 +1,5 @@
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subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F
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subdirs-$(CONFIG_CPU_AMD_SOCKET_754) += socket_754
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subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940
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subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2) += socket_AM2
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subdirs-$(CONFIG_CPU_AMD_GX1) += model_gx1
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@ -0,0 +1,9 @@
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config CPU_AMD_SOCKET_754
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bool
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default n
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select CPU_AMD_MODEL_FXX
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config CPU_SOCKET_TYPE
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hex
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default 0x10
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depends on CPU_AMD_SOCKET_754
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@ -0,0 +1,14 @@
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obj-y += socket_754.o
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subdirs-y += ../model_fxx
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subdirs-y += ../dualcore
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subdirs-y += ../mtrr
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subdirs-y += ../microcode
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/fpu
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subdirs-y += ../../x86/mmx
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subdirs-y += ../../x86/sse
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subdirs-y += ../../x86/lapic
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subdirs-y += ../../x86/cache
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/pae
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@ -36,14 +36,16 @@ initobj-y += crt0.o
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crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
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crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
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crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
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crt0-y += ../../../../src/arch/i386/lib/id.inc
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crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
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crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
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crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
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crt0-y += auto.inc
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ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
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ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
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ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
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ldscript-y += ../../../../src/arch/i386/lib/id.lds
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ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
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ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
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ldscript-y += ../../../../src/arch/i386/lib/failover.lds
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ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
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@ -25,6 +25,10 @@ choice
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source "src/mainboard/msi/ms6119/Kconfig"
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source "src/mainboard/msi/ms6147/Kconfig"
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source "src/mainboard/msi/ms6178/Kconfig"
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source "src/mainboard/msi/ms7135/Kconfig"
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source "src/mainboard/msi/ms7260/Kconfig"
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source "src/mainboard/msi/ms9185/Kconfig"
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source "src/mainboard/msi/ms9282/Kconfig"
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endchoice
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@ -0,0 +1,137 @@
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config BOARD_MSI_MS7135
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bool "MS7135"
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select ARCH_X86
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select CPU_AMD_K8
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select CPU_AMD_SOCKET_754
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_NVIDIA_CK804
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select SUPERIO_WINBOND_W83627THF
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select PIRQ_TABLE
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select USE_DCACHE_RAM
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select USE_PRINTK_IN_CAR
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config MAINBOARD_DIR
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string
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default msi/ms7135
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depends on BOARD_MSI_MS7135
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config APIC_ID_OFFSET
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hex
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default 0x10
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depends on BOARD_MSI_MS7135
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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depends on BOARD_MSI_MS7135
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config LB_CKS_RANGE_END
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int
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default 122
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depends on BOARD_MSI_MS7135
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config LB_CKS_LOC
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int
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default 123
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depends on BOARD_MSI_MS7135
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config MAINBOARD_PART_NUMBER
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string
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default "ms7135"
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depends on BOARD_MSI_MS7135
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x2895
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depends on BOARD_MSI_MS7135
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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depends on BOARD_MSI_MS7135
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config MEM_TRAIN_SEQ
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bool
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default n
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depends on BOARD_MSI_MS7135
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config MAX_CPUS
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int
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default 2
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depends on BOARD_MSI_MS7135
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config MAX_PHYSICAL_CPUS
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int
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default 1
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depends on BOARD_MSI_MS7135
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config MEM_TRAIN_SEQ
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bool
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default n
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depends on BOARD_MSI_MS7135
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config AP_CODE_IN_CAR
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bool
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default n
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depends on BOARD_MSI_MS7135
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config HW_MEM_HOLE_SIZE_AUTO_INC
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bool
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default n
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depends on BOARD_MSI_MS7135
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config HT_CHAIN_UNITID_BASE
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hex
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default 0
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depends on BOARD_MSI_MS7135
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x20
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depends on BOARD_MSI_MS7135
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config USE_INIT
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bool
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default n
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depends on BOARD_MSI_MS7135
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config SERIAL_CPU_INIT
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bool
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default y
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depends on BOARD_MSI_MS7135
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config AP_CODE_IN_CAR
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bool
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default y
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depends on BOARD_MSI_MS7135
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config WAIT_BEFORE_CPUS_INIT
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bool
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default n
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depends on BOARD_MSI_MS7135
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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depends on BOARD_MSI_MS7135
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config SB_HT_CHAIN_UNITID_OFFSET_ONLY
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bool
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default n
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depends on BOARD_MSI_MS7135
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config IRQ_SLOT_COUNT
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int
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default 13
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depends on BOARD_MSI_MS7135
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config DCACHE_RAM_BASE
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hex
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default 0xcf000
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depends on BOARD_MSI_MS7135
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config DCACHE_RAM_SIZE
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hex
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default 0x1000
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depends on BOARD_MSI_MS7135
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@ -0,0 +1 @@
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include $(src)/mainboard/tyan/Makefile.s289x.inc
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@ -0,0 +1,148 @@
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config BOARD_MSI_MS7260
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bool "MS7260"
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select ARCH_X86
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select CPU_AMD_K8
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select CPU_AMD_SOCKET_AM2
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_NVIDIA_MCP55
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select SUPERIO_WINBOND_W83627EHG
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select PIRQ_TABLE
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select USE_PRINTK_IN_CAR
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select HAVE_HIGH_TABLES
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select IOAPIC
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select MEM_TRAIN_SEQ
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select K8_REV_F_SUPPORT
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config MAINBOARD_DIR
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string
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default msi/ms7260
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depends on BOARD_MSI_MS7260
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config DCACHE_RAM_BASE
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hex
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default 0xc8000
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depends on BOARD_MSI_MS7260
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config DCACHE_RAM_SIZE
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hex
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default 0x08000
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depends on BOARD_MSI_MS7260
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config DCACHE_RAM_GLOBAL_VAR_SIZE
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hex
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default 0x01000
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depends on BOARD_MSI_MS7260
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config APIC_ID_OFFSET
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hex
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default 16
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depends on BOARD_MSI_MS7260
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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depends on BOARD_MSI_MS7260
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config LB_CKS_RANGE_START
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int
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default 49
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depends on BOARD_MSI_MS7260
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config LB_CKS_RANGE_END
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int
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default 122
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depends on BOARD_MSI_MS7260
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config LB_CKS_LOC
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int
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default 123
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depends on BOARD_MSI_MS7260
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config MAINBOARD_PART_NUMBER
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string
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default "ms7260"
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depends on BOARD_MSI_MS7260
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config PCI_64BIT_PREF_MEM
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bool
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default n
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depends on BOARD_MSI_MS7260
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config HAVE_FALLBACK_BOOT
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bool
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default n
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depends on BOARD_MSI_MS7260
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config USE_FALLBACK_IMAGE
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bool
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default n
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depends on BOARD_MSI_MS7260
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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depends on BOARD_MSI_MS7260
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config MAX_CPUS
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int
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default 2
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depends on BOARD_MSI_MS7260
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config MAX_PHYSICAL_CPUS
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int
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default 1
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depends on BOARD_MSI_MS7260
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config AP_CODE_IN_CAR
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bool
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default n
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depends on BOARD_MSI_MS7260
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config HW_MEM_HOLE_SIZE_AUTO_INC
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bool
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default n
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depends on BOARD_MSI_MS7260
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x0
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depends on BOARD_MSI_MS7260
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x0
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depends on BOARD_MSI_MS7260
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config USE_INIT
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bool
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default n
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depends on BOARD_MSI_MS7260
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config SERIAL_CPU_INIT
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bool
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default n
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depends on BOARD_MSI_MS7260
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config WAIT_BEFORE_CPUS_INIT
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bool
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default n
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depends on BOARD_MSI_MS7260
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1462
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depends on BOARD_MSI_MS7260
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x7260
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depends on BOARD_MSI_MS7260
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config IRQ_SLOT_COUNT
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int
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default 11
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depends on BOARD_MSI_MS7260
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@ -0,0 +1,64 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007-2008 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or
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## modify it under the terms of the GNU General Public License as
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## published by the Free Software Foundation; version 2 of
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## the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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## MA 02110-1301 USA
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##
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driver-y += mainboard.o
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#needed by irq_tables and mptable and acpi_tables
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obj-y += get_bus_conf.o
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obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
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obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
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obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
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obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
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# This is part of the conversion to init-obj and away from included code.
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initobj-y += crt0.o
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crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
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crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
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crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
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crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
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crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
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crt0-y += auto.inc
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ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
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ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
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ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
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ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
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ldscript-y += ../../../../src/arch/i386/lib/failover.lds
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ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
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ifdef POST_EVALUATION
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$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
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iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
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mv $(obj)/dsdt.hex $@
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$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
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$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
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$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
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$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
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$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
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$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
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perl -e 's/\.rodata/.rom.data/g' -pi $@
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perl -e 's/\.text/.section .rom.text/g' -pi $@
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||||
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endif
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@ -0,0 +1,123 @@
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config BOARD_MSI_MS9185
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bool "MS9185"
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select ARCH_X86
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select CPU_AMD_K8
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select CPU_AMD_SOCKET_F
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_BROADCOM_BCM5780
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select SOUTHBRIDGE_BROADCOM_BCM5785
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select SUPERIO_NSC_PC87417
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select HAVE_PIRQ_TABLE
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select USE_PRINTK_IN_CAR
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select USE_DCACHE_RAM
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config MAINBOARD_DIR
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string
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default msi/ms9185
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||||
depends on BOARD_MSI_MS9185
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config DCACHE_RAM_BASE
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hex
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default 0xcc000
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||||
depends on BOARD_MSI_MS9185
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config DCACHE_RAM_SIZE
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hex
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default 0x04000
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depends on BOARD_MSI_MS9185
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config DCACHE_RAM_GLOBAL_VAR_SIZE
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hex
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||||
default 0x01000
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depends on BOARD_MSI_MS9185
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|
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config APIC_ID_OFFSET
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hex
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||||
default 0x10
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||||
depends on BOARD_MSI_MS9185
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||||
|
||||
config HAVE_HARD_RESET
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||||
bool
|
||||
default y
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||||
depends on BOARD_MSI_MS9185
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||||
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||||
config IOAPIC
|
||||
bool
|
||||
default y
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
int
|
||||
default 122
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config LB_CKS_LOC
|
||||
int
|
||||
default 123
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config MAINBOARD_PART_NUMBER
|
||||
string
|
||||
default "ultra40"
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config HW_MEM_HOLE_SIZEK
|
||||
hex
|
||||
default 0x100000
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config USE_INIT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config CONSOLE_VGA
|
||||
bool
|
||||
default y
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config PCI_ROM_RUN
|
||||
bool
|
||||
default y
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 11
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
driver-y += mainboard.o
|
||||
|
||||
# Needed by irq_tables and mptable and acpi_tables.
|
||||
obj-y += get_bus_conf.o
|
||||
obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
|
||||
obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
|
||||
|
||||
# This is part of the conversion to init-obj and away from included code.
|
||||
|
||||
initobj-y += crt0.o
|
||||
# FIXME in $(top)/Makefile
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
|
||||
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
|
||||
crt0-y += ../../../../src/arch/i386/lib/id.inc
|
||||
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
|
||||
crt0-y += auto.inc
|
||||
|
||||
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/id.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
|
||||
|
||||
ifdef POST_EVALUATION
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
|
||||
perl -e 's/\.rodata/.rom.data/g' -pi $@
|
||||
perl -e 's/\.text/.section .rom.text/g' -pi $@
|
||||
|
||||
endif
|
||||
|
||||
|
|
@ -0,0 +1,148 @@
|
|||
config BOARD_MSI_MS9282
|
||||
bool "MS9282"
|
||||
select ARCH_X86
|
||||
select CPU_AMD_K8
|
||||
select CPU_AMD_SOCKET_F
|
||||
select NORTHBRIDGE_AMD_AMDK8
|
||||
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
|
||||
select SOUTHBRIDGE_NVIDIA_MCP55
|
||||
select SUPERIO_WINBOND_W83627EHG
|
||||
select PIRQ_TABLE
|
||||
select USE_PRINTK_IN_CAR
|
||||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select HAVE_HIGH_TABLES
|
||||
select IOAPIC
|
||||
select MEM_TRAIN_SEQ
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
select K8_REV_F_SUPPORT
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
default msi/ms9282
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config DCACHE_RAM_BASE
|
||||
hex
|
||||
default 0xcc000
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config DCACHE_RAM_SIZE
|
||||
hex
|
||||
default 0x04000
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config DCACHE_RAM_GLOBAL_VAR_SIZE
|
||||
hex
|
||||
default 0x01000
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config APIC_ID_OFFSET
|
||||
hex
|
||||
default 16
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config LB_CKS_RANGE_START
|
||||
int
|
||||
default 49
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
int
|
||||
default 122
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config LB_CKS_LOC
|
||||
int
|
||||
default 123
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config MAINBOARD_PART_NUMBER
|
||||
string
|
||||
default "ms9282"
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config PCI_64BIT_PREF_MEM
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config HAVE_FALLBACK_BOOT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config USE_FALLBACK_IMAGE
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config HW_MEM_HOLE_SIZEK
|
||||
hex
|
||||
default 0x100000
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 1
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config AP_CODE_IN_CAR
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config HW_MEM_HOLE_SIZE_AUTO_INC
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config USE_INIT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config SERIAL_CPU_INIT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config WAIT_BEFORE_CPUS_INIT
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
||||
hex
|
||||
default 0x1462
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
||||
hex
|
||||
default 0x9282
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 11
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
##
|
||||
## This file is part of the coreboot project.
|
||||
##
|
||||
## Copyright (C) 2007-2008 coresystems GmbH
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or
|
||||
## modify it under the terms of the GNU General Public License as
|
||||
## published by the Free Software Foundation; version 2 of
|
||||
## the License.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
## MA 02110-1301 USA
|
||||
##
|
||||
|
||||
driver-y += mainboard.o
|
||||
driver-y += ../../../drivers/i2c/i2cmux2/i2cmux2.o
|
||||
driver-y += ../../../drivers/i2c/adm1027/adm1027.o
|
||||
|
||||
#needed by irq_tables and mptable and acpi_tables
|
||||
obj-y += get_bus_conf.o
|
||||
obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
|
||||
obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
|
||||
obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
|
||||
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
|
||||
|
||||
# This is part of the conversion to init-obj and away from included code.
|
||||
initobj-y += crt0.o
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
|
||||
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
|
||||
crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
|
||||
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
|
||||
crt0-y += auto.inc
|
||||
|
||||
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
|
||||
ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
|
||||
ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
|
||||
|
||||
ifdef POST_EVALUATION
|
||||
|
||||
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
|
||||
iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
|
||||
mv $(obj)/dsdt.hex $@
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
|
||||
|
||||
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
|
||||
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
|
||||
perl -e 's/\.rodata/.rom.data/g' -pi $@
|
||||
perl -e 's/\.text/.section .rom.text/g' -pi $@
|
||||
|
||||
endif
|
||||
|
|
@ -34,14 +34,16 @@ initobj-y += crt0.o
|
|||
crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
|
||||
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
|
||||
crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
|
||||
crt0-y += ../../../../src/arch/i386/lib/id.inc
|
||||
crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
|
||||
crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
|
||||
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
|
||||
crt0-y += auto.inc
|
||||
|
||||
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
|
||||
ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/id.lds
|
||||
ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
|
||||
ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
|
||||
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
|
||||
|
||||
ifdef POST_EVALUATION
|
||||
|
|
|
|||
Loading…
Reference in New Issue