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soc/intel: Remove legacy static TPM asl code 

Since the TPM software stack refactoring static
TPM ACPI code isn't needed anymore.

Change-Id: I36a99cbc420ecfa55aa5c89787151d482225adf2
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/27715
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Philipp Deppenwiese 2018-07-28 23:34:20 +02:00 committed by Philipp Deppenwiese
parent 708cf4b34e
commit 66ce18c508
4 changed files with 0 additions and 93 deletions
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23
src/soc/intel/baytrail/acpi/lpc.asl
View File

@ -135,27 +135,4 @@ Device (LPCB)
// Include mainboard's superio.asl file. // Include mainboard's superio.asl file.
#include "acpi/superio.asl" #include "acpi/superio.asl"
#if IS_ENABLED(CONFIG_LPC_TPM)
Device (TPM) // Trusted Platform Module
{
Name(_HID, EISAID("IFX0102"))
Name(_CID, 0x310cd041)
Name(_UID, 1)
Method(_STA, 0)
{
If (TPMP) {
Return (0xf)
}
Return (0x0)
}
Name(_CRS, ResourceTemplate() {
IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
})
}
#endif
} }

23
src/soc/intel/braswell/acpi/lpc.asl
View File

@ -137,27 +137,4 @@ Device (LPCB)
/* Include mainboard's superio.asl file. */ /* Include mainboard's superio.asl file. */
#include "acpi/superio.asl" #include "acpi/superio.asl"
#if IS_ENABLED(CONFIG_LPC_TPM)
Device (TPM) /* Trusted Platform Module */
{
Name(_HID, EISAID("IFX0102"))
Name(_CID, 0x310cd041)
Name(_UID, 1)
Method(_STA, 0)
{
If (TPMP) {
Return (0xf)
}
Return (0x0)
}
Name(_CRS, ResourceTemplate() {
IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
})
}
#endif
} }

24
src/soc/intel/denverton_ns/acpi/lpc.asl
View File

@ -205,28 +205,4 @@ Device (LPCB)
Return(BUF0) Return(BUF0)
} }
} }
#ifdef ENABLE_TPM
Device (TPM) // Trusted Platform Module
{
Name(_HID, EISAID("IFX0102"))
Name(_CID, 0x310cd041)
Name(_UID, 1)
Method(_STA, 0)
{
If (TPMP) {
Return (0xf)
}
Return (0x0)
}
Name(_CRS, ResourceTemplate() {
IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
IRQ (Edge, Activehigh, Exclusive) { 6 }
})
}
#endif
} }

23
src/soc/intel/fsp_baytrail/acpi/lpc.asl
View File

@ -135,27 +135,4 @@ Device (LPCB)
// Include mainboard's superio.asl file. // Include mainboard's superio.asl file.
#include "acpi/superio.asl" #include "acpi/superio.asl"
#if IS_ENABLED(CONFIG_LPC_TPM)
Device (TPM) // Trusted Platform Module
{
Name(_HID, EISAID("IFX0102"))
Name(_CID, 0x310cd041)
Name(_UID, 1)
Method(_STA, 0)
{
If (TPMP) {
Return (0xf)
}
Return (0x0)
}
Name(_CRS, ResourceTemplate() {
IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
})
}
#endif
} }