mb/asrock/h110m: configure SuperIO global registers

Information based on superiotool dump.

Change-Id: I24ae9b1a7eab3095518341354544efe613912a6a
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Maxim Polyakov 2019-09-12 17:27:10 +03:00 committed by Felix Held
parent 15b0ab51b9
commit 66d875a143
1 changed files with 15 additions and 5 deletions

View File

@ -327,12 +327,22 @@ chip soc/intel/skylake
subsystemid 0x1849 0x1a43 subsystemid 0x1849 0x1a43
chip superio/nuvoton/nct6791d chip superio/nuvoton/nct6791d
device pnp 2e.0 off end # Floppy device pnp 2e.0 off end # Floppy
device pnp 2e.1 on # Parallel device pnp 2e.1 on
# global # Global Control Registers
irq 0x1c = 0x10 # Device IRQ Polarity
irq 0x13 = 0x00
irq 0x14 = 0x00
# Global Option
irq 0x24 = 0xfb
irq 0x27 = 0x10 irq 0x27 = 0x10
irq 0x2a = 0x64 # Multi Function
# parallel port irq 0x1a = 0xb0
irq 0x1b = 0xe6
irq 0x2a = 0x04
irq 0x2c = 0x40
irq 0x2d = 0x03
# Parallel Port
io 0x60 = 0x0378 io 0x60 = 0x0378
irq 0x70 = 7 irq 0x70 = 7
drq 0x74 = 4 # No DMA drq 0x74 = 4 # No DMA