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{drivers,soc}/intel/fsp1_1: Move chipset specific logo handling to SoC 

FSP logo handling used PcdLogoPtr and PcdLogoSize which are elements of
the chipset specific FSP structures.

Create soc_load_logo() which will pass the logo pointer and size.
This function will call fsp_load_logo which will load the logo.

BUG=NA
TEST= Build and verified logo is displayed on Facebook FBG1701

Change-Id: I86943e64ca1ddd05e7e88fc6b882cfd33b98272e
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37791
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Wim Vervoorn 2019-12-16 14:21:09 +01:00 committed by Patrick Georgi
parent 0e45b2875a
commit 67117c3971
4 changed files with 34 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/drivers/intel/fsp1_1/include/fsp/ramstage.h
View File

@ -26,6 +26,7 @@ void fsp_load(void);
/* Perform Intel silicon init. */
void intel_silicon_init(void);
void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup);
const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size);
/* Called after the silicon init code has run. */
void soc_after_silicon_init(void);
/* Initialize UPD data before SiliconInit call. */
@ -33,7 +34,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params);
void mainboard_silicon_init_params(SILICON_INIT_UPD *params);
void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
SILICON_INIT_UPD *new);
void load_logo(SILICON_INIT_UPD *params);
const struct cbmem_entry *soc_load_logo(SILICON_INIT_UPD *params);
void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params);
#endif /* _INTEL_COMMON_RAMSTAGE_H_ */

25
src/drivers/intel/fsp1_1/logo.c
View File

@ -11,15 +11,24 @@
* GNU General Public License for more details.
*/
#include <cbfs.h>
#include <cbmem.h>
#include <soc/ramstage.h>
#include <console/console.h>
#include <fsp/ramstage.h>
#include <include/cbfs.h>
void load_logo(SILICON_INIT_UPD *params)
const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size)
{
params->PcdLogoSize = cbfs_boot_load_file("logo.bmp", (void *)params->PcdLogoPtr,
params->PcdLogoSize, CBFS_TYPE_RAW);
if (!params->PcdLogoSize)
params->PcdLogoPtr = 0;
const struct cbmem_entry *logo_entry = NULL;
void *logo_buffer;
logo_entry = cbmem_entry_add(CBMEM_ID_FSP_LOGO, 1 * MiB);
if (logo_entry) {
logo_buffer = cbmem_entry_start(logo_entry);
if (logo_buffer) {
*logo_size = cbfs_boot_load_file("logo.bmp", (void *)logo_buffer,
1 * MiB, CBFS_TYPE_RAW);
if (logo_size)
*logo_ptr = (UINT32)logo_buffer;
}
}
return (logo_entry);
}

19
src/drivers/intel/fsp1_1/ramstage.c
View File

@ -69,7 +69,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
EFI_STATUS status;
UPD_DATA_REGION *upd_ptr;
VPD_DATA_REGION *vpd_ptr;
const struct cbmem_entry *logo_entry;
const struct cbmem_entry *logo_entry = NULL;
/* Display the FSP header */
if (fsp_info_header == NULL) {
@ -96,13 +96,8 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
load_vbt(is_s3_wakeup, &silicon_init_params);
mainboard_silicon_init_params(&silicon_init_params);
if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup) {
silicon_init_params.PcdLogoSize = 1 * MiB;
logo_entry = cbmem_entry_add(CBMEM_ID_FSP_LOGO,
silicon_init_params.PcdLogoSize);
silicon_init_params.PcdLogoPtr = (UINT32)cbmem_entry_start(logo_entry);
load_logo(&silicon_init_params);
}
if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup)
logo_entry = soc_load_logo(&silicon_init_params);
/* Display the UPD data */
if (CONFIG(DISPLAY_UPD_DATA))
@ -122,7 +117,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
/* The logo_entry can be freed up now as it is not required any longer */
if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup)
if (logo_entry && !is_s3_wakeup)
cbmem_entry_remove(logo_entry);
/* Mark graphics init done after SiliconInit if VBT was provided */
@ -214,3 +209,9 @@ __weak void soc_display_silicon_init_params(
__weak void soc_silicon_init_params(SILICON_INIT_UPD *params)
{
}
/* Load bmp and set FSP parameters, fsp_load_logo can be used */
__weak const struct cbmem_entry *soc_load_logo(SILICON_INIT_UPD *params)
{
return NULL;
}

5
src/soc/intel/braswell/chip.c
View File

@ -181,6 +181,11 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
board_silicon_USB2_override(params);
}
const struct cbmem_entry *soc_load_logo(SILICON_INIT_UPD *params)
{
return fsp_load_logo(&params->PcdLogoPtr, &params->PcdLogoSize);
}
void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
SILICON_INIT_UPD *new)
{