soc/intel/skylake: Initialize UART based on CONFIG_UART_DEBUG

Current implementation checks for CONFIG_BOOTBLOCK_CONSOLE and then
initializes UART. If only CONFIG_BOOTBLOCK_CONSOLE
is enabled without enabling CONFIG_UART_DEBUG, there are
compilation issues. This is the case when using SIO UART for Skylake
DT platform. Hence initialize UART when CONFIG_UART_DEBUG is enabled
and not based on CONFIG_BOOTBLOCK_CONSOLE.

Also move BOOTBLOCK_CONSOLE out from UART_DEBUG to CPU_SPECIFIC_OPTIONS
as part of the fix needed.

Change-Id: Id422a55a68d64a06fc874bddca46b0ef5be6d596
Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com>
Reviewed-on: https://review.coreboot.org/17349
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Teo Boon Tiong 2016-11-10 21:06:51 +08:00 committed by Aaron Durbin
parent cfa1fd2b20
commit 673a4d0f4d
2 changed files with 2 additions and 2 deletions

View File

@ -13,6 +13,7 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_ROMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32
select ARCH_VERSTAGE_X86_32 select ARCH_VERSTAGE_X86_32
select ACPI_NHLT select ACPI_NHLT
select BOOTBLOCK_CONSOLE
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS select CACHE_MRC_SETTINGS
@ -182,7 +183,6 @@ config VGA_BIOS_ID
config UART_DEBUG config UART_DEBUG
bool "Enable UART debug port." bool "Enable UART debug port."
default n default n
select BOOTBLOCK_CONSOLE
select CONSOLE_SERIAL select CONSOLE_SERIAL
select DRIVERS_UART select DRIVERS_UART
select DRIVERS_UART_8250MEM_32 select DRIVERS_UART_8250MEM_32

View File

@ -28,7 +28,7 @@ void bootblock_soc_early_init(void)
bootblock_pch_early_init(); bootblock_pch_early_init();
bootblock_cpu_init(); bootblock_cpu_init();
if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) if (IS_ENABLED(CONFIG_UART_DEBUG))
pch_uart_init(); pch_uart_init();
} }