GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Tell vgabios code in a couple of boards/chipsets about CBFS 

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2009-10-03 16:27:48 +00:00
parent 6768f39a4b
commit 689a720485
6 changed files with 12 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/artecgroup/dbe61/realmode/vgabios.c
View File

@ -7,6 +7,7 @@
#include <arch/io.h> #include <arch/io.h>
#include <string.h> #include <string.h>
#include "chip.h" #include "chip.h"
#include <cbfs.h>
/* vgabios.c. Derived from: */ /* vgabios.c. Derived from: */
@ -266,7 +267,7 @@ void do_vgabios(device_t dev)
{ {
unsigned long busdevfn; unsigned long busdevfn;
unsigned int rom = dev->rom_address; unsigned int rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
unsigned char *buf; unsigned char *buf;
unsigned int size = 64*1024; unsigned int size = 64*1024;
int i; int i;

3
src/mainboard/via/epia-m/vgabios.c
View File

@ -7,6 +7,7 @@
//#include <printk.h> //#include <printk.h>
#include <string.h> #include <string.h>
#include "vgachip.h" #include "vgachip.h"
#include <cbfs.h>
/* vgabios.c. Derived from: */ /* vgabios.c. Derived from: */
@ -356,7 +357,7 @@ void do_vgabios(void)
/* declare rom address here - keep any config data out of the way /* declare rom address here - keep any config data out of the way
* of core LXB stuff */ * of core LXB stuff */
rom = 0xfffc0000; rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
printk_debug("rom base, size: %x\n", rom); printk_debug("rom base, size: %x\n", rom);

3
src/northbridge/via/cn400/vgabios.c
View File

@ -7,6 +7,7 @@
//#include <printk.h> //#include <printk.h>
#include <string.h> #include <string.h>
#include "vgachip.h" #include "vgachip.h"
#include <cbfs.h>
/* vgabios.c. Derived from: */ /* vgabios.c. Derived from: */
@ -356,7 +357,7 @@ void do_vgabios(void)
/* declare rom address here - keep any config data out of the way /* declare rom address here - keep any config data out of the way
* of core LXB stuff */ * of core LXB stuff */
rom = 0xfff80000; rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
printk_debug("VGA BIOS ROM base address: %x\n", rom); printk_debug("VGA BIOS ROM base address: %x\n", rom);

3
src/northbridge/via/cn700/vgabios.c
View File

@ -7,6 +7,7 @@
//#include <printk.h> //#include <printk.h>
#include <string.h> #include <string.h>
#include "vgachip.h" #include "vgachip.h"
#include <cbfs.h>
/* vgabios.c. Derived from: */ /* vgabios.c. Derived from: */
@ -356,7 +357,7 @@ void do_vgabios(void)
/* declare rom address here - keep any config data out of the way /* declare rom address here - keep any config data out of the way
* of core LXB stuff */ * of core LXB stuff */
rom = 0xfff80000; rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
printk_debug("rom base, size: %x\n", rom); printk_debug("rom base, size: %x\n", rom);

3
src/northbridge/via/cx700/vgabios.c
View File

@ -28,6 +28,7 @@
#undef __KERNEL__ #undef __KERNEL__
#include <arch/io.h> #include <arch/io.h>
#include <string.h> #include <string.h>
#include <cbfs.h>
void write_protect_vgabios(void); void write_protect_vgabios(void);
@ -323,7 +324,7 @@ void do_vgabios(void)
* of core LXB stuff */ * of core LXB stuff */
#warning ROM address hardcoded to 512K #warning ROM address hardcoded to 512K
rom = 0xfff80000; rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1); pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1);
printk_debug("rom base, size: %x\n", rom); printk_debug("rom base, size: %x\n", rom);

3
src/northbridge/via/vx800/vgabios.c
View File

@ -6,6 +6,7 @@
#include <arch/io.h> #include <arch/io.h>
#include <string.h> #include <string.h>
#include "vgachip.h" #include "vgachip.h"
#include <cbfs.h>
/* vgabios.c. Derived from: */ /* vgabios.c. Derived from: */
@ -319,7 +320,7 @@ void do_vgabios(void)
/* declare rom address here - keep any config data out of the way /* declare rom address here - keep any config data out of the way
* of core LXB stuff */ * of core LXB stuff */
rom = 0xffffffff - CONFIG_ROM_SIZE + 1; rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1); pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1);
printk_debug("rom base: %x\n", rom); printk_debug("rom base: %x\n", rom);
buf = (unsigned char *)rom; buf = (unsigned char *)rom;