Revert "mb/google/brya: Set EPP to 45% for all Brya variants"

This reverts commit 938f33e9f7.

A power and performance analysis performed on Alder Lake demonstrated
that with an EPP (Energy Performance Preference) at 50% along with
EET (Energy Efficient Turbo) disabled, the overall SoC performance are
similar or better and the SoC uses less power.

For instance some browser benchmark results improved by 2% and some
multi-core tests by 4% while at the same time power consumption
lowered by approximately 7.6%.

BRANCH=firmware-brya-14505.B
BUG=b:240669428
TEST=verify that EPP is back to the by default 50% setting
     `iotools rdmsr 0 0x774'

Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: Icacc555e62533ced30db83e0a036db1c85c0bfa6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66283
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhixing Ma <zhixing.ma@intel.com>
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb

@@ -122,10 +122,6 @@ chip soc/intel/alderlake
 		},
 	}"
 
-	# set EPP to 45%: 45 * 256/100 = 115 = 0x73
-	register "enable_energy_perf_pref" = "true"
-	register "energy_perf_pref_value" = "0x73"
-
 	device domain 0 on
 		device ref igpu on end
 		device ref dtt on end