some black magic for initializing the old version of the k8t800
Change-Id: I1b5d23cee9f933aa090c9bd09890c7b335567e17 Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/388 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
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@ -33,9 +33,14 @@ static void bridge_enable(struct device *dev)
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writeback(dev, 0x40, 0x91);
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writeback(dev, 0x41, 0x40);
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writeback(dev, 0x43, 0x44);
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#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
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writeback(dev, 0x42, 0x80);
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writeback(dev, 0x44, 0x35);
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#else
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writeback(dev, 0x44, 0x31); /* K8M890 should have 0x35 datasheet
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* says it is reserved
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*/
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#endif
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writeback(dev, 0x45, 0x3a);
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writeback(dev, 0x46, 0x88); /* PCI ID lo */
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writeback(dev, 0x47, 0xb1); /* PCI ID hi */
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@ -44,7 +49,11 @@ static void bridge_enable(struct device *dev)
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* (Forward VGA compatible memory and I/O cycles )
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*/
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#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
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writeback(dev, 0x3e, 0x0a);
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#else
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writeback(dev, 0x3e, 0x16);
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#endif
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dump_south(dev);
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/* disable I/O and memory decode, or it freezes PCI bus during BAR sizing */
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@ -51,12 +51,21 @@ void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb)
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pci_write_config8(dev, 0x70, 0xc2);
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/* PCI Control */
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#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
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pci_write_config8(dev, 0x72, 0xee);
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#endif
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pci_write_config8(dev, 0x73, 0x01);
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#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
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pci_write_config8(dev, 0x74, 0x64);
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pci_write_config8(dev, 0x75, 0x3f);
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#else
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pci_write_config8(dev, 0x74, 0x24);
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pci_write_config8(dev, 0x75, 0x0f);
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#endif
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pci_write_config8(dev, 0x76, 0x50);
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#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
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pci_write_config8(dev, 0x77, 0x08);
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#endif
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pci_write_config8(dev, 0x78, 0x01);
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/* APIC on HT */
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pci_write_config8(dev, 0x7c, 0x7f);
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@ -151,7 +160,9 @@ static void ctrl_init(struct device *dev)
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/* PCI CFG Address bits[27:24] are used as extended register address
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bit[11:8] */
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#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
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pci_write_config8(dev, 0x47, 0x30);
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#endif
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/* VT8237R specific configuration other SB are done in their own directories */
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