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src: Use space after switch, while 

Change-Id: I150591aa3624895c4c321101a251547dd23d1db5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44172
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2020-08-04 13:20:13 +02:00 committed by Angel Pons
parent 239272e43d
commit 6aa9d66873
5 changed files with 10 additions and 10 deletions
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2
src/mainboard/lenovo/t400/dock.c
View File

@ -23,7 +23,7 @@ static int poll_clk_stable(pnp_devfn_t dev, int timeout)
{
/* Enable 14.318MHz CLK on CLKIN */
pnp_write_config(dev, 0x29, 0xa0);
while(!(pnp_read_config(dev, 0x29) & 0x10) && timeout--)
while (!(pnp_read_config(dev, 0x29) & 0x10) && timeout--)
udelay(1000);
if (!timeout)
return 1;

6
src/mainboard/lenovo/t60/dock.c
View File

@ -75,7 +75,7 @@ int dlpc_init(void)
/* Enable 14.318MHz CLK on CLKIN */
dlpc_write_register(0x29, 0xa0);
while(!(dlpc_read_register(0x29) & 0x10) && timeout--)
while (!(dlpc_read_register(0x29) & 0x10) && timeout--)
udelay(1000);
if (!timeout)
@ -102,7 +102,7 @@ static int dock_superio_init(void)
/* startup 14.318MHz Clock */
dock_write_register(0x29, 0xa0);
/* wait until clock is settled */
while(!(dock_read_register(0x29) & 0x10) && timeout--)
while (!(dock_read_register(0x29) & 0x10) && timeout--)
udelay(1000);
if (!timeout)
@ -171,7 +171,7 @@ int dock_connect(void)
timeout = 1000;
while(!(inb(DLPC_CONTROL) & 8) && timeout--)
while (!(inb(DLPC_CONTROL) & 8) && timeout--)
udelay(1000);
if (!timeout) {

2
src/mainboard/lenovo/t60/early_init.c
View File

@ -25,7 +25,7 @@ static void early_superio_config(void)
pnp_write_config(dev, 0x29, 0xa0);
while(!(pnp_read_config(dev, 0x29) & 0x10) && timeout--)
while (!(pnp_read_config(dev, 0x29) & 0x10) && timeout--)
udelay(1000);
/* Enable COM1 */

6
src/mainboard/lenovo/x60/dock.c
View File

@ -72,7 +72,7 @@ int dlpc_init(void)
/* Enable 14.318MHz CLK on CLKIN */
dlpc_write_register(0x29, 0xa0);
while(!(dlpc_read_register(0x29) & 0x10) && timeout--)
while (!(dlpc_read_register(0x29) & 0x10) && timeout--)
udelay(1000);
if (!timeout)
@ -99,7 +99,7 @@ int dock_connect(void)
timeout = 1000;
while(!(inb(0x164c) & 8) && timeout--)
while (!(inb(0x164c) & 8) && timeout--)
udelay(1000);
if (!timeout) {
@ -121,7 +121,7 @@ int dock_connect(void)
dock_write_register(0x29, 0x06);
/* wait until clock is settled */
timeout = 1000;
while(!(dock_read_register(0x29) & 0x08) && timeout--)
while (!(dock_read_register(0x29) & 0x08) && timeout--)
udelay(1000);
if (!timeout)

4
src/northbridge/intel/x4x/dq_dqs.c
View File

@ -220,7 +220,7 @@ static int find_dq_limit(const struct sysinfo *s, const u8 channel,
expected_result == FAILING ? "failing" : "succeeding", channel);
memset(pass_count, 0, sizeof(pass_count));
while(succes_mask) {
while (succes_mask) {
test_result = test_dq_aligned(s, channel);
FOR_EACH_BYTELANE(lane) {
if (((test_result >> lane) & 1) != expected_result) {
@ -390,7 +390,7 @@ static int rt_find_dqs_limit(struct sysinfo *s, u8 channel,
FOR_EACH_BYTELANE(lane)
rt_set_dqs(channel, lane, 0, &dqs_setting[lane]);
while(status == CB_SUCCESS) {
while (status == CB_SUCCESS) {
test_result = test_dqs_aligned(s, channel);
if (test_result == (expected_result == SUCCEEDING ? 0 : 0xff))
return CB_SUCCESS;