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mb/lenovo: Remove unnecessary whitespace in comments 

This makes diff between boards even smaller in some cases.

Change-Id: I42ecaf5de657275708ddaf2c926fe31fe16a7220
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
This commit is contained in:
Peter Lemenkov 2020-01-22 11:40:16 +01:00 committed by Patrick Georgi
parent 46cef44dad
commit 6b7d40a973
41 changed files with 66 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/mainboard/lenovo/g505s/acpi/gpe.asl
View File

@ -15,18 +15,18 @@
Scope(\_GPE) { /* Start Scope GPE */
/* Legacy PM event */
/* Legacy PM event */
Method(_L08) {
/* DBGO("\\_GPE\\_L08\n") */
}
/* Temp warning (TWarn) event */
/* Temp warning (TWarn) event */
Method(_L09) {
/* DBGO("\\_GPE\\_L09\n") */
/* Notify (\_TZ.TZ00, 0x80) */
}
/* USB controller PME# */
/* USB controller PME# */
Method(_L0B) {
Store("USB PME", Debug)
/* Notify devices of wake event */
@ -39,13 +39,13 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PWRB, 0x02)
}
/* ExtEvent0 SCI event */
/* ExtEvent0 SCI event */
Method(_L10) {
/* DBGO("\\_GPE\\_L10\n") */
}
/* ExtEvent1 SCI event */
/* ExtEvent1 SCI event */
Method(_L11) {
/* DBGO("\\_GPE\\_L11\n") */
}
@ -59,7 +59,7 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.LID, 0x80)
}
/* GPIO0 or GEvent8 event */
/* GPIO0 or GEvent8 event */
Method(_L18) {
Store("PCI bridge wake event", Debug)
/* Notify PCI bridges of wake event */
@ -67,7 +67,7 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.PBR5, 0x02)
}
/* Azalia SCI event */
/* Azalia SCI event */
Method(_L1B) {
/* DBGO("\\_GPE\\_L1B\n") */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */

2
src/mainboard/lenovo/g505s/acpi/usb_oc.asl
View File

@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
/* USB overcurrent mapping pins. */
/* USB overcurrent mapping pins. */
Name(UOM0, 0)
Name(UOM1, 2)
Name(UOM2, 0)

8
src/mainboard/lenovo/g505s/buildOpts.c
View File

@ -30,7 +30,7 @@
#include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
@ -43,13 +43,13 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT FALSE
#define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE
/* Select the CPU socket type. */
/* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -182,7 +182,7 @@
//#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID
//#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID
/* Process the options...
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
/*

2
src/mainboard/lenovo/g505s/dsdt.asl
View File

@ -66,7 +66,7 @@ DefinitionBlock (
/* Describe PCI INT[A-H] for the Southbridge */
#include <southbridge/amd/agesa/hudson/acpi/pci_int.asl>
} /* End Scope(_SB) */
} /* End Scope(_SB) */
Scope(\_SB.PCI0.LIBR) {
#include "acpi/ec.asl"

2
src/mainboard/lenovo/g505s/ec.h
View File

@ -21,4 +21,4 @@
void lenovo_g505s_ec_init(void);
#endif /* _MAINBOARD_LENOVO_G505S_EC_H */
#endif /* _MAINBOARD_LENOVO_G505S_EC_H */

2
src/mainboard/lenovo/g505s/mainboard.h
View File

@ -38,4 +38,4 @@
/* Enable PS/2 Keyboard and Mouse */
#define SIO_EC_ENABLE_PS2K
#endif /* _MAINBOARD_LENOVO_G505S_MAINBOARD_H */
#endif /* _MAINBOARD_LENOVO_G505S_MAINBOARD_H */

2
src/mainboard/lenovo/g505s/mptable.c
View File

@ -138,7 +138,7 @@ static void *smp_write_config_table(void *v)
PCI_INT(0x0, 0x11, 0x0, intr_data[0x40]);
PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]);
/* on board NIC & Slot PCIE. */
/* on board NIC & Slot PCIE. */
/* PCI slots */
struct device *dev = pcidev_on_root(0x14, 4);

4
src/mainboard/lenovo/l520/acpi/platform.asl
View File

@ -16,14 +16,14 @@
Method(_WAK,1)
{
/* ME may not be up yet. */
/* ME may not be up yet. */
Store (0, \_TZ.MEB1)
Store (0, \_TZ.MEB2)
/* Wake the HKEY to init BT/WWAN */
\_SB.PCI0.LPCB.EC.HKEY.WAKE (Arg0)
/* Not implemented. */
/* Not implemented. */
Return(Package(){0,0})
}

2
src/mainboard/lenovo/l520/dsdt.asl
View File

@ -30,7 +30,7 @@ DefinitionBlock(
#include "acpi/platform.asl"
#include <cpu/intel/common/acpi/cpu.asl>
#include <southbridge/intel/common/acpi/platform.asl>
/* global NVS and variables. */
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>

4
src/mainboard/lenovo/l520/smihandler.c
View File

@ -75,9 +75,9 @@ void mainboard_smi_sleep(u8 slp_typ)
{
if (slp_typ == 3) {
u8 ec_wake = ec_read(0x32);
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
if (ec_wake & 0x14) {
/* Redirect EC WAKE GPE to SCI. */
/* Redirect EC WAKE GPE to SCI. */
gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
}
}

2
src/mainboard/lenovo/s230u/early_init.c
View File

@ -83,7 +83,7 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
printk(BIOS_INFO, "SPD index %d (%s)\n",
spd_index, mainboard_spd_names[spd_index]);
/* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */
/* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */
spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
&spd_file_len);

2
src/mainboard/lenovo/s230u/ec.h
View File

@ -25,4 +25,4 @@ void lenovo_s230u_ec_init(void);
#define ec_mm_set_bit(addr, bit) (ECMM(0x100 + addr) |= 1 << bit)
#define ec_mm_clr_bit(addr, bit) (ECMM(0x100 + addr) &= ~(1 << bit))
#endif /* _MAINBOARD_LENOVO_S230U_EC_H */
#endif /* _MAINBOARD_LENOVO_S230U_EC_H */

2
src/mainboard/lenovo/t400/acpi/gpe.asl
View File

@ -20,7 +20,7 @@ Scope (\_GPE)
{
/* Read EC register to clear wake status */
Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
/* So that we don't get a warning that Local0 is unused. */
/* So that we don't get a warning that Local0 is unused. */
Increment (Local0)
}
}

2
src/mainboard/lenovo/t410/acpi/gpe.asl
View File

@ -20,7 +20,7 @@ Scope (\_GPE)
{
/* Read EC register to clear wake status */
Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
/* So that we don't get a warning that Local0 is unused. */
/* So that we don't get a warning that Local0 is unused. */
Increment (Local0)
}
}

6
src/mainboard/lenovo/t410/hda_verb.c
View File

@ -18,7 +18,7 @@
const u32 cim_verb_data[] = {
0x14f15069, /* Codec Vendor / Device ID: Conexant CX20585 */
0x17aa214c, /* Subsystem ID */
0x17aa214c, /* Subsystem ID */
11, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(0, 0x17aa214c),
AZALIA_PIN_CFG(0, 0x19, 0x042110f0),
@ -32,8 +32,8 @@ const u32 cim_verb_data[] = {
AZALIA_PIN_CFG(0, 0x22, 0x40f001f0),
AZALIA_PIN_CFG(0, 0x23, 0x90a601f0),
0x80862804, /* Codec Vendor / Device ID: Intel Ibexpeak HDMI. */
0x17aa21b5, /* Subsystem ID */
0x80862804, /* Codec Vendor / Device ID: Intel Ibexpeak HDMI. */
0x17aa21b5, /* Subsystem ID */
4, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(3, 0x17aa21b5),
AZALIA_PIN_CFG(3, 0x04, 0x18560010),

2
src/mainboard/lenovo/t420s/smihandler.c
View File

@ -76,7 +76,7 @@ void mainboard_smi_sleep(u8 slp_typ)
u8 ec_wake = ec_read(0x32);
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
if (ec_wake & 0x14) {
/* Redirect EC WAKE GPE to SCI. */
/* Redirect EC WAKE GPE to SCI. */
gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
}
}

2
src/mainboard/lenovo/t430/acpi/platform.asl
View File

@ -15,7 +15,7 @@
Method(_WAK,1)
{
/* ME may not be up yet. */
/* ME may not be up yet. */
Store (0, \_TZ.MEB1)
Store (0, \_TZ.MEB2)

2
src/mainboard/lenovo/t430/dsdt.asl
View File

@ -34,7 +34,7 @@ DefinitionBlock(
#include "acpi/platform.asl"
#include <cpu/intel/common/acpi/cpu.asl>
#include <southbridge/intel/common/acpi/platform.asl>
/* global NVS and variables. */
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>

2
src/mainboard/lenovo/t430/smihandler.c
View File

@ -76,7 +76,7 @@ void mainboard_smi_sleep(u8 slp_typ)
u8 ec_wake = ec_read(0x32);
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
if (ec_wake & 0x14) {
/* Redirect EC WAKE GPE to SCI. */
/* Redirect EC WAKE GPE to SCI. */
gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
}
}

2
src/mainboard/lenovo/t430s/variants/t431s/romstage.c
View File

@ -42,7 +42,7 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
{
/* C1S0 is a soldered RAM with no real SPD. Use stored SPD. */
/* C1S0 is a soldered RAM with no real SPD. Use stored SPD. */
size_t spd_file_len = 0;
void *spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
&spd_file_len);

2
src/mainboard/lenovo/t440p/acpi/platform.asl
View File

@ -16,7 +16,7 @@
Method(_WAK,1)
{
/* ME may not be up yet. */
/* ME may not be up yet. */
Store (0, \_TZ.MEB1)
Store (0, \_TZ.MEB2)
Return(Package(){0,0})

4
src/mainboard/lenovo/t440p/smihandler.c
View File

@ -91,9 +91,9 @@ void mainboard_smi_sleep(u8 slp_typ)
if (slp_typ == 3) {
u8 ec_wake = ec_read(0x32);
/* If EC wake events are enabled,
* enable wake on EC WAKE GPE. */
* enable wake on EC WAKE GPE. */
if (ec_wake & 0x14) {
/* Redirect EC WAKE GPE to SCI. */
/* Redirect EC WAKE GPE to SCI. */
gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
}
}

2
src/mainboard/lenovo/t520/smihandler.c
View File

@ -76,7 +76,7 @@ void mainboard_smi_sleep(u8 slp_typ)
u8 ec_wake = ec_read(0x32);
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
if (ec_wake & 0x14) {
/* Redirect EC WAKE GPE to SCI. */
/* Redirect EC WAKE GPE to SCI. */
gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
}
}

4
src/mainboard/lenovo/t530/acpi/platform.asl
View File

@ -28,13 +28,13 @@ Method(_PTS,1)
Method(_WAK,1)
{
/* ME may not be up yet. */
/* ME may not be up yet. */
Store (0, \_TZ.MEB1)
Store (0, \_TZ.MEB2)
/* Wake the HKEY to init BT/WWAN */
\_SB.PCI0.LPCB.EC.HKEY.WAKE (Arg0)
/* Not implemented. */
/* Not implemented. */
Return(Package(){0,0})
}

2
src/mainboard/lenovo/t530/smihandler.c
View File

@ -76,7 +76,7 @@ void mainboard_smi_sleep(u8 slp_typ)
u8 ec_wake = ec_read(0x32);
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
if (ec_wake & 0x14) {
/* Redirect EC WAKE GPE to SCI. */
/* Redirect EC WAKE GPE to SCI. */
gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
}
}

2
src/mainboard/lenovo/t60/acpi/gpe.asl
View File

@ -20,7 +20,7 @@ Scope (\_GPE)
{
/* Read EC register to clear wake status */
Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
/* So that we don't get a warning that Local0 is unused. */
/* So that we don't get a warning that Local0 is unused. */
Increment (Local0)
}
}

4
src/mainboard/lenovo/x131e/acpi/platform.asl
View File

@ -28,13 +28,13 @@ Method(_PTS,1)
Method(_WAK,1)
{
/* ME may not be up yet. */
/* ME may not be up yet. */
Store (0, \_TZ.MEB1)
Store (0, \_TZ.MEB2)
/* Wake the HKEY to init BT/WWAN */
\_SB.PCI0.LPCB.EC.HKEY.WAKE (Arg0)
/* Not implemented. */
/* Not implemented. */
Return(Package(){0,0})
}

2
src/mainboard/lenovo/x131e/hda_verb.c
View File

@ -76,7 +76,7 @@ const u32 cim_verb_data[] = {
};
const u32 pc_beep_verbs[] = {
0x00170500, /* power up everything (codec, dac, adc, mixers) */
0x00170500, /* power up everything (codec, dac, adc, mixers) */
0x01470740, /* enable speaker out */
0x01470c02, /* set speaker EAPD pin */
0x0143b01f, /* unmute speaker */

4
src/mainboard/lenovo/x1_carbon_gen1/acpi/platform.asl
View File

@ -28,13 +28,13 @@ Method(_PTS,1)
Method(_WAK,1)
{
/* ME may not be up yet. */
/* ME may not be up yet. */
Store (0, \_TZ.MEB1)
Store (0, \_TZ.MEB2)
/* Wake the HKEY to init BT/WWAN */
\_SB.PCI0.LPCB.EC.HKEY.WAKE (Arg0)
/* Not implemented. */
/* Not implemented. */
Return(Package(){0,0})
}

4
src/mainboard/lenovo/x1_carbon_gen1/smihandler.c
View File

@ -74,9 +74,9 @@ void mainboard_smi_sleep(u8 slp_typ)
{
if (slp_typ == 3) {
u8 ec_wake = ec_read(0x32);
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
if (ec_wake & 0x14) {
/* Redirect EC WAKE GPE to SCI. */
/* Redirect EC WAKE GPE to SCI. */
gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
}
}

2
src/mainboard/lenovo/x200/acpi/gpe.asl
View File

@ -20,7 +20,7 @@ Scope (\_GPE)
{
/* Read EC register to clear wake status */
Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
/* So that we don't get a warning that Local0 is unused. */
/* So that we don't get a warning that Local0 is unused. */
Increment (Local0)
}
}

2
src/mainboard/lenovo/x200/blc.c
View File

@ -23,7 +23,7 @@ static const struct blc_pwm_t blc_entries[] = {
/* corrected to 320MHz CDClk, vendor set 753; works fine at both: */
{"LTD121EQ3B", 447},
{"LTD121EWVB", 165},
{"LTD133EQ1B", 264}, /* Found on an X301 */
{"LTD133EQ1B", 264}, /* Found on an X301 */
{"B121EW03 V6 ", 165},
/* datasheets: between 100 and 20k, typical 200 */
/* TESTED: works best at 400 */

2
src/mainboard/lenovo/x200/romstage.c
View File

@ -25,7 +25,7 @@ void get_mb_spd_addrmap(u8 *spd_addrmap)
void mb_post_raminit_setup(void)
{
/* FIXME: make a proper SMBUS mux support. */
/* FIXME: make a proper SMBUS mux support. */
/* Set the SMBUS mux to the eeprom */
set_gpio(42, GPIO_LEVEL_LOW);
}

2
src/mainboard/lenovo/x201/acpi/gpe.asl
View File

@ -20,7 +20,7 @@ Scope (\_GPE)
{
/* Read EC register to clear wake status */
Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
/* So that we don't get a warning that Local0 is unused. */
/* So that we don't get a warning that Local0 is unused. */
Increment (Local0)
}
}

6
src/mainboard/lenovo/x201/acpi/platform.asl
View File

@ -29,14 +29,14 @@ Method(_PTS,1)
Method(_WAK,1)
{
/* ME may not be up yet. */
/* ME may not be up yet. */
Store (0, \_TZ.MEB1)
Store (0, \_TZ.MEB2)
/* Wake the HKEY to init BT/WWAN */
\_SB.PCI0.LPCB.EC.HKEY.WAKE (Arg0)
/* Not implemented. */
/* Not implemented. */
Return(Package(){0,0})
}
@ -69,7 +69,7 @@ Scope(\_SB)
* interrupts can happen
*/
/* TRAP(71) */ /* TODO */
/* TRAP(71) */ /* TODO */
/* Determine the Operating System and save the value in OSYS.
* We have to do this in order to be able to work around

6
src/mainboard/lenovo/x201/hda_verb.c
View File

@ -18,7 +18,7 @@
const u32 cim_verb_data[] = {
0x14f15069, /* Codec Vendor / Device ID: Conexant CX20585 */
0x17aa2155, /* Subsystem ID */
0x17aa2155, /* Subsystem ID */
11, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(0, 0x17aa2155),
AZALIA_PIN_CFG(0, 0x19, 0x042140f0), /* Headphone jack */
@ -32,8 +32,8 @@ const u32 cim_verb_data[] = {
AZALIA_PIN_CFG(0, 0x22, 0x40f001f0),
AZALIA_PIN_CFG(0, 0x23, 0x90a601f0), /* Internal mic boost volume */
0x80862804, /* Codec Vendor / Device ID: Intel Ibexpeak HDMI. */
0x17aa21b5, /* Subsystem ID */
0x80862804, /* Codec Vendor / Device ID: Intel Ibexpeak HDMI. */
0x17aa21b5, /* Subsystem ID */
4, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(3, 0x17aa21b5),
AZALIA_PIN_CFG(3, 0x04, 0x58560010),

4
src/mainboard/lenovo/x220/acpi/platform.asl
View File

@ -28,13 +28,13 @@ Method(_PTS,1)
Method(_WAK,1)
{
/* ME may not be up yet. */
/* ME may not be up yet. */
Store (0, \_TZ.MEB1)
Store (0, \_TZ.MEB2)
/* Wake the HKEY to init BT/WWAN */
\_SB.PCI0.LPCB.EC.HKEY.WAKE (Arg0)
/* Not implemented. */
/* Not implemented. */
Return(Package(){0,0})
}

2
src/mainboard/lenovo/x220/smihandler.c
View File

@ -76,7 +76,7 @@ void mainboard_smi_sleep(u8 slp_typ)
u8 ec_wake = ec_read(0x32);
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
if (ec_wake & 0x14) {
/* Redirect EC WAKE GPE to SCI. */
/* Redirect EC WAKE GPE to SCI. */
gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
}
}

4
src/mainboard/lenovo/x230/acpi/platform.asl
View File

@ -28,13 +28,13 @@ Method(_PTS,1)
Method(_WAK,1)
{
/* ME may not be up yet. */
/* ME may not be up yet. */
Store (0, \_TZ.MEB1)
Store (0, \_TZ.MEB2)
/* Wake the HKEY to init BT/WWAN */
\_SB.PCI0.LPCB.EC.HKEY.WAKE (Arg0)
/* Not implemented. */
/* Not implemented. */
Return(Package(){0,0})
}

4
src/mainboard/lenovo/x230/smihandler.c
View File

@ -74,9 +74,9 @@ void mainboard_smi_sleep(u8 slp_typ)
{
if (slp_typ == 3) {
u8 ec_wake = ec_read(0x32);
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
if (ec_wake & 0x14) {
/* Redirect EC WAKE GPE to SCI. */
/* Redirect EC WAKE GPE to SCI. */
gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
}
}

2
src/mainboard/lenovo/x60/acpi/gpe.asl
View File

@ -20,7 +20,7 @@ Scope (\_GPE)
{
/* Read EC register to clear wake status */
Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
/* So that we don't get a warning that Local0 is unused. */
/* So that we don't get a warning that Local0 is unused. */
Increment (Local0)
}
}