mb/google/zork: Add GPIO to Shuboz support

1. AGPIO5 to NC
2. EGPIO141 to NC
3. EGPIO144 to NC

BUG=b:174528384
BRANCH=zork
TEST=emerge-zork coreboot

Signed-off-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com>
Change-Id: I51f291476e01982e1a3f92cd1b338a528434112d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48002
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kane Chen 2020-11-25 23:05:18 +08:00 committed by Hung-Te Lin
parent 9ca96f35f7
commit 6c04b353c5
2 changed files with 24 additions and 0 deletions

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@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
subdirs-y += ./spd subdirs-y += ./spd
ramstage-y += gpio.c

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@ -0,0 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <boardid.h>
#include <gpio.h>
#include <soc/gpio.h>
#include <ec/google/chromeec/ec.h>
static const struct soc_amd_gpio bid_gpio_set_stage_ram[] = {
/* AGPIO_5 - NC */
PAD_NC(GPIO_5),
/* EGPIO141 - NC */
PAD_NC(GPIO_141),
/* EGPIO144 - NC (etk5515 not used) */
PAD_NC(GPIO_144),
};
const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
{
*size = ARRAY_SIZE(bid_gpio_set_stage_ram);
return bid_gpio_set_stage_ram;
}