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coreboot-kgpe-d16
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mb: Add space before closing comment block keyword 

Run the command below to fix all occurrences.

    $ git grep -l 'ramstage\*/' | xargs sed -i 's,ramstage\*/,ramstage */,'

Change-Id: Ied155d325846fc0ef3e823e5708c6f74e3d7998f
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60247
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Paul Menzel 2021-12-20 08:05:12 +01:00 committed by Felix Held
parent ff01bca624
commit 6c307d7646
24 changed files with 25 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/dedede/variants/baseboard/gpio.c
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@ -5,7 +5,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* GPP_A0 thru GPP_A6 come configured out of reset, do not touch */
/* A0 : ESPI_IO0 */

2
src/mainboard/google/dedede/variants/blipper/gpio.c
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@ -4,7 +4,7 @@
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* C18 : AP_I2C_EMR_SDA */
PAD_NC(GPP_C18, NONE),

2
src/mainboard/google/dedede/variants/boten/gpio.c
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@ -4,7 +4,7 @@
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A10 : WWAN_EN => LTE_PWR_OFF_ODL */
PAD_CFG_GPO(GPP_A10, 1, PWROK),

2
src/mainboard/google/dedede/variants/bugzzy/gpio.c
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@ -5,7 +5,7 @@
#include <bootstate.h>
#include <fw_config.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A10 : WWAN_EN */
PAD_CFG_GPO(GPP_A10, 1, PWROK),

4
src/mainboard/google/dedede/variants/drawcia/gpio.c
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@ -7,14 +7,14 @@
#include <fw_config.h>
#include <ec/google/chromeec/ec.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config not_board6or8_gpio_table[] = {
/* C12 : AP_PEN_DET_ODL */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, UP_20K, DEEP),
};
/* bid6: Pad configuration for board version 6 or 8 in ramstage*/
/* bid6: Pad configuration for board version 6 or 8 in ramstage */
static const struct pad_config board6or8_gpio_table[] = {
/* A10 : WWAN_EN */

2
src/mainboard/google/dedede/variants/galtic/gpio.c
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@ -3,7 +3,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A11 : TOUCH_RPT_EN */

2
src/mainboard/google/dedede/variants/gooey/gpio.c
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@ -4,7 +4,7 @@
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A10 : WWAN_EN => LTE_PWR_OFF_ODL */
PAD_CFG_GPO(GPP_A10, 1, PWROK),

2
src/mainboard/google/dedede/variants/haboki/gpio.c
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@ -6,7 +6,7 @@
#include <fw_config.h>
#include <ec/google/chromeec/ec.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* C12 : AP_PEN_DET_ODL has an external pull-up and hence no pad termination.*/
PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, NONE, DEEP),

2
src/mainboard/google/dedede/variants/kracko/gpio.c
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@ -3,7 +3,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A10 : WWAN_EN */
PAD_CFG_GPO(GPP_A10, 1, PWROK),

2
src/mainboard/google/dedede/variants/metaknight/gpio.c
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@ -4,7 +4,7 @@
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A10 : WWAN_EN => LTE_PWR_OFF_ODL */
PAD_CFG_GPO(GPP_A10, 1, PWROK),

2
src/mainboard/google/dedede/variants/pirika/gpio.c
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@ -3,7 +3,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A11 : TOUCH_RPT_EN */

2
src/mainboard/google/dedede/variants/sasuke/gpio.c
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@ -3,7 +3,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A10 : WWAN_EN */
PAD_CFG_GPO(GPP_A10, 1, PWROK),

2
src/mainboard/google/dedede/variants/sasukette/gpio.c
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@ -3,7 +3,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A10 : WWAN_EN */
PAD_CFG_GPO(GPP_A10, 1, PWROK),

2
src/mainboard/google/dedede/variants/storo/gpio.c
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@ -3,7 +3,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* A10 : WWAN_EN */
PAD_CFG_GPO(GPP_A10, 1, PWROK),

2
src/mainboard/google/dedede/variants/waddledee/gpio.c
View File

@ -3,7 +3,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* E5 : AP_SUB_IO_2 */
PAD_CFG_GPO(GPP_E5, 0, PLTRST),

2
src/mainboard/google/guybrush/variants/baseboard/gpio.c
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@ -8,7 +8,7 @@
#include <gpio.h>
#include <soc/gpio.h>
/* GPIO configuration in ramstage*/
/* GPIO configuration in ramstage */
/* Please make sure that *ALL* GPIOs are configured in this table */
static const struct soc_amd_gpio base_gpio_table[] = {
/* PWR_BTN_L */

2
src/mainboard/intel/adlrvp/gpio.c
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@ -5,7 +5,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* SSD1_PWREN CPU SSD1 */
PAD_CFG_GPO(GPP_D14, 1, PLTRST),

2
src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c
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@ -3,7 +3,7 @@
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/*BT_RF_KILL_N*/
PAD_CFG_GPO(GPP_E11, 1, DEEP),

2
src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c
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@ -5,7 +5,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* I2S2_SCLK */
PAD_CFG_GPI(GPP_A7, NONE, PLTRST),

2
src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c
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@ -5,7 +5,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* I2S2_SCLK */
PAD_CFG_GPI(GPP_A7, NONE, PLTRST),

2
src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
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@ -5,7 +5,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* WWAN_WAKE_N */

2
src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
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@ -5,7 +5,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* PCH M.2 SSD */
PAD_CFG_GPO(GPP_B16, 1, DEEP),

2
src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
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@ -5,7 +5,7 @@
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* PCH M.2 SSD */
PAD_CFG_GPO(GPP_B16, 1, DEEP),

2
src/mainboard/siemens/mc_ehl/variants/mc_ehl1/gpio.c
View File

@ -3,7 +3,7 @@
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
/* Pad configuration in ramstage*/
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
/* Community 0 - GpioGroup GPP_B */
PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), /* PMC_VRALERT_N */