x86: flatten hierarchy

It never made sense to have bootblock_* in init, but
pirq_routing.c in boot, and some ld scripts on the main
level while others live in subdirectories.

This patch flattens the directory hierarchy and makes
x86 more similar to the other architectures.

Change-Id: I4056038fe7813e4d3d3042c441e7ab6076a36384
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10901
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

src/arch/x86/Makefile.inc

@@ -19,13 +19,6 @@
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc.
 ##
-###############################################################################
-# Take care of subdirectories
-###############################################################################
-subdirs-y += boot
-# subdirs-y += init
-subdirs-y += lib
-subdirs-y += smp
 
 ################################################################################
 # i386 specific tools
@@ -74,20 +67,20 @@ CBFS_BASE_ADDRESS=$(call int-add, $(call int-subtract, 0xffffffff $(CONFIG_CBFS_
 
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32)$(CONFIG_ARCH_BOOTBLOCK_X86_64),y)
 
-bootblock-srcs += $(src)/arch/x86/init/failover.ld
+bootblock-srcs += $(src)/arch/x86/failover.ld
 bootblock-srcs += $(src)/cpu/x86/16bit/entry16.ld
 bootblock-srcs += $(src)/cpu/x86/16bit/reset16.ld
-bootblock-srcs += $(src)/arch/x86/lib/id.ld
+bootblock-srcs += $(src)/arch/x86/id.ld
 ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
 bootblock-srcs += $(src)/cpu/intel/fit/fit.ld
 endif
 
 # TODO: Why can't this use the real bootblock-y += xxx.S mechanism instead?
-bootblock_inc = $(src)/arch/x86/init/prologue.inc
+bootblock_inc = $(src)/arch/x86/prologue.inc
 bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
 bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
 bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
-bootblock_inc += $(src)/arch/x86/lib/id.inc
+bootblock_inc += $(src)/arch/x86/id.inc
 ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
 bootblock_inc += $(src)/cpu/intel/fit/fit.inc
 endif
@@ -97,7 +90,7 @@ ifeq ($(CONFIG_SSE),y)
 bootblock_inc += $(src)/cpu/x86/sse_enable.inc
 endif
 bootblock_inc += $(objgenerated)/bootblock.inc
-bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
+bootblock_inc += $(src)/arch/x86/walkcbfs.S
 
 bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__ -D__BOOTBLOCK__
 ifeq ($(CONFIG_SSE),y)
@@ -121,7 +114,7 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
 	$(CC_bootblock) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
 
-$(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
+$(objgenerated)/bootblock.inc: $(src)/arch/x86/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
 	@printf "    ROMCC      $(subst $(obj)/,,$(@))\n"
 	$(CC_bootblock) $(CPPFLAGS_bootblock) -MM -MT$(objgenerated)/bootblock.inc \
 		$< > $(objgenerated)/bootblock.inc.d
@@ -144,8 +137,8 @@ endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64
 
 ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
 
-crt0s = $(src)/arch/x86/init/prologue.inc
+crt0s = $(src)/arch/x86/prologue.inc
-romstage-srcs += $(src)/arch/x86/init/romstage.ld
+romstage-srcs += $(src)/arch/x86/romstage.ld
 crt0s += $(src)/cpu/x86/32bit/entry32.inc
 romstage-srcs += $(src)/cpu/x86/32bit/entry32.ld
 
@@ -160,7 +153,7 @@ crt0s += $(cpu_incs-y)
 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ifeq ($(CONFIG_ROMCC),y)
-crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
+crt0s += $(src)/arch/x86/crt0_romcc_epilogue.inc
 endif
 
 ifeq ($(CONFIG_ROMCC),y)
@@ -339,3 +332,64 @@ endif
 endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64
 
 
+ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
+
+romstage-y += cbmem.c
+romstage-y += boot.c
+
+romstage-y += cbfs_and_run.c
+romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c
+romstage-y += memset.c
+romstage-y += memcpy.c
+romstage-y += memmove.c
+romstage-y += mmap_boot.c
+
+romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
+
+endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
+
+ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
+
+ramstage-y += boot.c
+ramstage-y += gdt.c
+ramstage-y += tables.c
+ramstage-y += cbmem.c
+ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
+ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
+ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
+ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
+ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen.c
+ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
+
+ramstage-y += c_start.S
+ramstage-y += cpu.c
+ramstage-y += cpu_common.c
+ramstage-y += pci_ops_conf1.c
+ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
+ramstage-y += exception.c
+ramstage-$(CONFIG_IOAPIC) += ioapic.c
+ramstage-y += memset.c
+ramstage-y += memcpy.c
+ramstage-y += memmove.c
+ramstage-y += ebda.c
+ramstage-y += mmap_boot.c
+ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
+ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
+ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
+
+smm-y += memset.c
+smm-y += memcpy.c
+smm-y += memmove.c
+smm-y += mmap_boot.c
+
+ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
+rmodules_x86_32-y += memset.c
+rmodules_x86_32-y += memcpy.c
+rmodules_x86_32-y += memmove.c
+else
+rmodules_x86_64-y += memset.c
+rmodules_x86_64-y += memcpy.c
+rmodules_x86_64-y += memmove.c
+endif
+
+endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64

src/arch/x86/boot/Makefile.inc

@@ -1,22 +0,0 @@
-
-ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
-
-romstage-y += cbmem.c
-romstage-y += boot.c
-
-endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
-
-ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
-
-ramstage-y += boot.c
-ramstage-y += gdt.c
-ramstage-y += tables.c
-ramstage-y += cbmem.c
-ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
-ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
-ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
-ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
-ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen.c
-ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
-
-endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64

src/arch/x86/init/Makefile.inc

@@ -1 +0,0 @@
-# If you add something to this file, enable it in src/arch/x86/Makefile.inc first.

src/arch/x86/lib/Makefile.inc

@@ -1,48 +0,0 @@
-
-ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
-
-romstage-y += cbfs_and_run.c
-romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c
-romstage-y += memset.c
-romstage-y += memcpy.c
-romstage-y += memmove.c
-romstage-y += mmap_boot.c
-
-endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
-
-ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
-
-ramstage-y += c_start.S
-ramstage-y += cpu.c
-ramstage-y += cpu_common.c
-ramstage-y += pci_ops_conf1.c
-ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
-ramstage-y += exception.c
-ramstage-$(CONFIG_IOAPIC) += ioapic.c
-ramstage-y += memset.c
-ramstage-y += memcpy.c
-ramstage-y += memmove.c
-ramstage-y += ebda.c
-ramstage-y += mmap_boot.c
-ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
-ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
-ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
-
-romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
-
-smm-y += memset.c
-smm-y += memcpy.c
-smm-y += memmove.c
-smm-y += mmap_boot.c
-
-ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
-rmodules_x86_32-y += memset.c
-rmodules_x86_32-y += memcpy.c
-rmodules_x86_32-y += memmove.c
-else
-rmodules_x86_64-y += memset.c
-rmodules_x86_64-y += memcpy.c
-rmodules_x86_64-y += memmove.c
-endif
-
-endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64

src/mainboard/bifferos/bifferboard/romstage.c

@@ -23,7 +23,7 @@
 #include <arch/io.h>
 #include <device/pnp_def.h>
 #include <pc80/mc146818rtc.h>
-#include "arch/x86/lib/romcc_console.c"
+#include "arch/x86/romcc_console.c"
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 

src/mainboard/dmp/vortex86ex/romstage.c

@@ -21,7 +21,7 @@
 #include <stdint.h>
 #include <arch/io.h>
 #include <stdlib.h>
-#include "arch/x86/lib/romcc_console.c"
+#include "arch/x86/romcc_console.c"
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <halt.h>

src/northbridge/intel/fsp_rangeley/Makefile.inc

@@ -28,7 +28,7 @@ ramstage-y += acpi.c
 ramstage-y += port_access.c
 
 romstage-y += raminit.c
-romstage-y += ../../../arch/x86/lib/walkcbfs.S
+romstage-y += ../../../arch/x86/walkcbfs.S
 romstage-y += port_access.c
 
 smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c

src/northbridge/intel/fsp_sandybridge/Makefile.inc

@@ -31,7 +31,7 @@ romstage-y += raminit.c
 romstage-y += ram_calc.c
 romstage-y += early_init.c
 romstage-y += report_platform.c
-romstage-y += ../../../arch/x86/lib/walkcbfs.S
+romstage-y += ../../../arch/x86/walkcbfs.S
 
 smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c

src/northbridge/intel/haswell/Makefile.inc

@@ -32,7 +32,7 @@ romstage-y += raminit.c
 romstage-y += mrccache.c
 romstage-y += early_init.c
 romstage-y += report_platform.c
-romstage-y += ../../../arch/x86/lib/walkcbfs.S
+romstage-y += ../../../arch/x86/walkcbfs.S
 
 smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
 

src/northbridge/intel/nehalem/Makefile.inc

@@ -31,7 +31,7 @@ romstage-y += ram_calc.c
 romstage-y += raminit.c
 romstage-y += early_init.c
 romstage-y += ../sandybridge/mrccache.c
-romstage-y += ../../../arch/x86/lib/walkcbfs.S
+romstage-y += ../../../arch/x86/walkcbfs.S
 
 smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
 

src/northbridge/intel/sandybridge/Makefile.inc

@@ -40,7 +40,7 @@ romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE) += ../../../device/dram/
 romstage-y += mrccache.c
 romstage-y += early_init.c
 romstage-y += report_platform.c
-romstage-y += ../../../arch/x86/lib/walkcbfs.S
+romstage-y += ../../../arch/x86/walkcbfs.S
 
 smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c