x86: flatten hierarchy
It never made sense to have bootblock_* in init, but pirq_routing.c in boot, and some ld scripts on the main level while others live in subdirectories. This patch flattens the directory hierarchy and makes x86 more similar to the other architectures. Change-Id: I4056038fe7813e4d3d3042c441e7ab6076a36384 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/10901 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -19,13 +19,6 @@
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## along with this program; if not, write to the Free Software
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## Foundation, Inc.
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##
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###############################################################################
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# Take care of subdirectories
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###############################################################################
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subdirs-y += boot
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# subdirs-y += init
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subdirs-y += lib
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subdirs-y += smp
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################################################################################
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# i386 specific tools
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@ -74,20 +67,20 @@ CBFS_BASE_ADDRESS=$(call int-add, $(call int-subtract, 0xffffffff $(CONFIG_CBFS_
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ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32)$(CONFIG_ARCH_BOOTBLOCK_X86_64),y)
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bootblock-srcs += $(src)/arch/x86/init/failover.ld
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bootblock-srcs += $(src)/arch/x86/failover.ld
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bootblock-srcs += $(src)/cpu/x86/16bit/entry16.ld
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bootblock-srcs += $(src)/cpu/x86/16bit/reset16.ld
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bootblock-srcs += $(src)/arch/x86/lib/id.ld
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bootblock-srcs += $(src)/arch/x86/id.ld
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ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
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bootblock-srcs += $(src)/cpu/intel/fit/fit.ld
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endif
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# TODO: Why can't this use the real bootblock-y += xxx.S mechanism instead?
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bootblock_inc = $(src)/arch/x86/init/prologue.inc
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bootblock_inc = $(src)/arch/x86/prologue.inc
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bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
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bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
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bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
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bootblock_inc += $(src)/arch/x86/lib/id.inc
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bootblock_inc += $(src)/arch/x86/id.inc
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ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
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bootblock_inc += $(src)/cpu/intel/fit/fit.inc
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endif
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@ -97,7 +90,7 @@ ifeq ($(CONFIG_SSE),y)
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bootblock_inc += $(src)/cpu/x86/sse_enable.inc
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endif
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bootblock_inc += $(objgenerated)/bootblock.inc
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bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
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bootblock_inc += $(src)/arch/x86/walkcbfs.S
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bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__ -D__BOOTBLOCK__
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ifeq ($(CONFIG_SSE),y)
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@ -121,7 +114,7 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC_bootblock) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
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$(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
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$(objgenerated)/bootblock.inc: $(src)/arch/x86/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
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@printf " ROMCC $(subst $(obj)/,,$(@))\n"
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$(CC_bootblock) $(CPPFLAGS_bootblock) -MM -MT$(objgenerated)/bootblock.inc \
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$< > $(objgenerated)/bootblock.inc.d
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@ -144,8 +137,8 @@ endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64
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ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
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crt0s = $(src)/arch/x86/init/prologue.inc
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romstage-srcs += $(src)/arch/x86/init/romstage.ld
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crt0s = $(src)/arch/x86/prologue.inc
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romstage-srcs += $(src)/arch/x86/romstage.ld
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crt0s += $(src)/cpu/x86/32bit/entry32.inc
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romstage-srcs += $(src)/cpu/x86/32bit/entry32.ld
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@ -160,7 +153,7 @@ crt0s += $(cpu_incs-y)
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crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
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ifeq ($(CONFIG_ROMCC),y)
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crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
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crt0s += $(src)/arch/x86/crt0_romcc_epilogue.inc
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endif
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ifeq ($(CONFIG_ROMCC),y)
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@ -339,3 +332,64 @@ endif
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endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64
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ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
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romstage-y += cbmem.c
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romstage-y += boot.c
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romstage-y += cbfs_and_run.c
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romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c
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romstage-y += memset.c
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romstage-y += memcpy.c
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romstage-y += memmove.c
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romstage-y += mmap_boot.c
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romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
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endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
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ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
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ramstage-y += boot.c
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ramstage-y += gdt.c
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ramstage-y += tables.c
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ramstage-y += cbmem.c
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ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
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ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
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ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen.c
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ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
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ramstage-y += c_start.S
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ramstage-y += cpu.c
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ramstage-y += cpu_common.c
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ramstage-y += pci_ops_conf1.c
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ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
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ramstage-y += exception.c
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ramstage-$(CONFIG_IOAPIC) += ioapic.c
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ramstage-y += memset.c
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ramstage-y += memcpy.c
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ramstage-y += memmove.c
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ramstage-y += ebda.c
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ramstage-y += mmap_boot.c
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ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
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ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
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ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
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smm-y += memset.c
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smm-y += memcpy.c
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smm-y += memmove.c
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smm-y += mmap_boot.c
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ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
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rmodules_x86_32-y += memset.c
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rmodules_x86_32-y += memcpy.c
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rmodules_x86_32-y += memmove.c
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else
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rmodules_x86_64-y += memset.c
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rmodules_x86_64-y += memcpy.c
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rmodules_x86_64-y += memmove.c
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endif
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endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64
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@ -1,22 +0,0 @@
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ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
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romstage-y += cbmem.c
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romstage-y += boot.c
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endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
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ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
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ramstage-y += boot.c
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ramstage-y += gdt.c
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ramstage-y += tables.c
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ramstage-y += cbmem.c
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ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
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ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
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ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen.c
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ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
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endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64
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@ -1 +0,0 @@
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# If you add something to this file, enable it in src/arch/x86/Makefile.inc first.
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@ -1,48 +0,0 @@
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ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
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romstage-y += cbfs_and_run.c
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romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c
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romstage-y += memset.c
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romstage-y += memcpy.c
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romstage-y += memmove.c
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romstage-y += mmap_boot.c
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endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
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ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
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ramstage-y += c_start.S
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ramstage-y += cpu.c
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ramstage-y += cpu_common.c
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ramstage-y += pci_ops_conf1.c
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ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
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ramstage-y += exception.c
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ramstage-$(CONFIG_IOAPIC) += ioapic.c
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ramstage-y += memset.c
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ramstage-y += memcpy.c
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ramstage-y += memmove.c
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ramstage-y += ebda.c
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ramstage-y += mmap_boot.c
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ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
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ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
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ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
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romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
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smm-y += memset.c
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smm-y += memcpy.c
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smm-y += memmove.c
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smm-y += mmap_boot.c
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ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
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rmodules_x86_32-y += memset.c
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rmodules_x86_32-y += memcpy.c
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rmodules_x86_32-y += memmove.c
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else
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rmodules_x86_64-y += memset.c
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rmodules_x86_64-y += memcpy.c
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rmodules_x86_64-y += memmove.c
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endif
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endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64
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@ -23,7 +23,7 @@
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <pc80/mc146818rtc.h>
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#include "arch/x86/lib/romcc_console.c"
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#include "arch/x86/romcc_console.c"
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#include <console/console.h>
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#include <cpu/x86/cache.h>
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@ -21,7 +21,7 @@
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#include <stdint.h>
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#include <arch/io.h>
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#include <stdlib.h>
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#include "arch/x86/lib/romcc_console.c"
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#include "arch/x86/romcc_console.c"
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#include <console/console.h>
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#include <cpu/x86/cache.h>
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#include <halt.h>
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@ -28,7 +28,7 @@ ramstage-y += acpi.c
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ramstage-y += port_access.c
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romstage-y += raminit.c
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romstage-y += ../../../arch/x86/lib/walkcbfs.S
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romstage-y += ../../../arch/x86/walkcbfs.S
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romstage-y += port_access.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
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@ -31,7 +31,7 @@ romstage-y += raminit.c
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romstage-y += ram_calc.c
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romstage-y += early_init.c
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romstage-y += report_platform.c
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romstage-y += ../../../arch/x86/lib/walkcbfs.S
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romstage-y += ../../../arch/x86/walkcbfs.S
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smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
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@ -32,7 +32,7 @@ romstage-y += raminit.c
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romstage-y += mrccache.c
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romstage-y += early_init.c
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romstage-y += report_platform.c
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romstage-y += ../../../arch/x86/lib/walkcbfs.S
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romstage-y += ../../../arch/x86/walkcbfs.S
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smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
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@ -31,7 +31,7 @@ romstage-y += ram_calc.c
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romstage-y += raminit.c
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romstage-y += early_init.c
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romstage-y += ../sandybridge/mrccache.c
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romstage-y += ../../../arch/x86/lib/walkcbfs.S
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romstage-y += ../../../arch/x86/walkcbfs.S
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smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
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@ -40,7 +40,7 @@ romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE) += ../../../device/dram/
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romstage-y += mrccache.c
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romstage-y += early_init.c
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romstage-y += report_platform.c
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romstage-y += ../../../arch/x86/lib/walkcbfs.S
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romstage-y += ../../../arch/x86/walkcbfs.S
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smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
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