superio/ite/it8613e: add support for ITE IT8613E
This change adds support for the SuperIO chip IT8613E. This chip uses FANs 2-5 and has SmartGuardian always enabled (no ON/OFF control) so it relies on support in common ITE code. LDNs were taken from IT8613E Preliminary Specification V0.3. Change-Id: I73c083b7019163c1203a5aabbef7d9d8f5ccb16a Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31617 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Krystian Hebel
Nico Huber
parent
d60cc97526
commit
6d81b15bbe
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2009 Ronald G. Minnich
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## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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## Copyright (C) 2017 Gergely Kiss <mail.gery@gmail.com>
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## Copyright (C) 2018 Kevin Cody-Little <kcodyjr@gmail.com>
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## Copyright (C) 2019 Protectli
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config SUPERIO_ITE_IT8613E
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bool
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select SUPERIO_ITE_COMMON_PRE_RAM
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select SUPERIO_ITE_ENV_CTRL
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select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2
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select SUPERIO_ITE_ENV_CTRL_8BIT_PWM
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select SUPERIO_ITE_ENV_CTRL_5FANS
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select SUPERIO_ITE_ENV_CTRL_NO_ONOFF
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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## Copyright (C) 2017 Gergely Kiss <mail.gery@gmail.com>
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## Copyright (C) 2019 Protectli
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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ramstage-$(CONFIG_SUPERIO_ITE_IT8613E) += superio.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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* Copyright (C) 2019 Protectli
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef SUPERIO_ITE_IT8613E_CHIP_H
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#define SUPERIO_ITE_IT8613E_CHIP_H
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#include <superio/ite/common/env_ctrl_chip.h>
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struct superio_ite_it8613e_config {
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struct ite_ec_config ec;
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};
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#endif /* SUPERIO_ITE_IT8613E_CHIP_H */
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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* Copyright (C) 2017 Gergely Kiss <mail.gery@gmail.com>
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* Copyright (C) 2019 Protectli
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef SUPERIO_ITE_IT8613E_H
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#define SUPERIO_ITE_IT8613E_H
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/*
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* IT8613 supports 2 clock inputs: PCICLK and CLKIN. Multiple registers need
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* to be set to choose proper source. PCICLK is required for LPC.
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*
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* In the table below PD means pull-down, X - don't care.
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*
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* |-------------------------------------------------------------------|
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* | CLKIN | PCICLK | LDN7\ | GBL\ | LDN7\ | LDN7\ | GBL\ |
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* | | | 71h[3] | 23h[3] | 2Dh[2] | 2Dh[1] | 23h[0] |
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* |--------+--------+---------+---------+---------+---------+---------|
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* | PD | 33 MHz | X | 0 | 0 | 0 | 0 |
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* | PD | 24 MHz | 1 | 1 | X | 0 | 1 |
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* | PD | 25 MHz | X | 0 | 1 | 0 | 0 |
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* | 24 MHz | X | 0 | 1 | X | 0 | 1 |
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* | 48 MHz | X | 0 | 1 | X | 0 | 0 |
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* |-------------------------------------------------------------------|
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*
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*/
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#define IT8613E_SP1 0x01 /* Com1 */
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#define IT8613E_EC 0x04 /* Environment controller */
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#define IT8613E_KBCK 0x05 /* PS/2 keyboard */
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#define IT8613E_KBCM 0x06 /* PS/2 mouse */
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#define IT8613E_GPIO 0x07 /* GPIO */
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#define IT8613E_CIR 0x0a /* Consumer Infrared */
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#endif /* SUPERIO_ITE_IT8613E_H */
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@ -0,0 +1,85 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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* Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de>
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* Copyright (C) 2017 Gergely Kiss <mail.gery@gmail.com>
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* Copyright (C) 2019 Protectli
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <device/pnp.h>
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#include <pc80/keyboard.h>
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#include <superio/conf_mode.h>
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#include <superio/ite/common/env_ctrl.h>
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#include "chip.h"
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#include "it8613e.h"
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static void it8613e_init(struct device *dev)
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{
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const struct superio_ite_it8613e_config *conf = dev->chip_info;
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const struct resource *res;
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if (!dev->enabled)
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return;
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switch (dev->path.pnp.device) {
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case IT8613E_EC:
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res = find_resource(dev, PNP_IDX_IO0);
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if (!conf || !res)
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break;
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ite_ec_init(res->base, &conf->ec);
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break;
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case IT8613E_KBCK:
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pc_keyboard_init(NO_AUX_DEVICE);
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break;
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case IT8613E_KBCM:
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break;
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}
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}
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = pnp_enable_resources,
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.enable = pnp_alt_enable,
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.init = it8613e_init,
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.ops_pnp_mode = &pnp_conf_mode_870155_aa,
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};
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static struct pnp_info pnp_dev_info[] = {
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/* Serial Port 1 */
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{ NULL, IT8613E_SP1, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0x0ff8, },
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/* Environmental Controller */
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{ NULL, IT8613E_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0ff8, 0x0ff8, },
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/* KBC Keyboard */
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{ NULL, IT8613E_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC0,
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0x0fff, 0x0fff, },
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/* KBC Mouse */
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{ NULL, IT8613E_KBCM, PNP_IRQ0 | PNP_MSC0, },
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/* GPIO */
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{ NULL, IT8613E_GPIO, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0ffc, 0x0ff8, },
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/* Consumer Infrared */
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{ NULL, IT8613E_CIR, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0x0ff8, },
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_ite_it8613e_ops = {
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CHIP_NAME("ITE IT8613E Super I/O")
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.enable_dev = enable_dev,
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};
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