IRQ setup for EPIA
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich
parent
e0005ba6d1
commit
6dd6c68507
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@ -14,6 +14,7 @@
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#include <stdint.h>
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#include <bitops.h>
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#include <string.h>
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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@ -679,3 +680,68 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max)
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printk_spew("%s returns max %d\n", __FUNCTION__, max);
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return max;
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}
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/*
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Tell the EISA int controller this int must be level triggered
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THIS IS A KLUDGE -- sorry, this needs to get cleaned up.
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*/
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static void pci_level_irq(unsigned char intNum)
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{
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unsigned intBits = inb(0x4d0) | (((unsigned) inb(0x4d1)) << 8);
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intBits |= (1 << intNum);
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// Write new values
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outb((unsigned char) intBits, 0x4d0);
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outb((unsigned char) (intBits >> 8), 0x4d1);
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}
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/*
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This function assigns IRQs for all functions contained within
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the indicated device address. If the device does not exist or does
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not require interrupts then this function has no effect.
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This function should be called for each PCI slot in your system.
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pIntAtoD is an array of IRQ #s that are assigned to PINTA through PINTD of
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this slot.
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The particular irq #s that are passed in depend on the routing inside
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your southbridge and on your motherboard.
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-kevinh@ispiri.com
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*/
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void pci_assign_irqs(unsigned bus, unsigned slot,
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const unsigned char pIntAtoD[4])
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{
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unsigned functNum;
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device_t pdev;
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unsigned char line;
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unsigned char irq;
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unsigned char readback;
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/* Each slot may contain up to eight functions */
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for (functNum = 0; functNum < 8; functNum++) {
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pdev = dev_find_slot(bus, (slot << 3) + functNum);
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if (pdev) {
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line = pci_read_config8(pdev, PCI_INTERRUPT_PIN);
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// PCI spec says all other values are reserved
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if ((line >= 1) && (line <= 4)) {
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irq = pIntAtoD[line - 1];
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printk_debug("Assigning IRQ %d to %d:%x.%d\n", \
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irq, bus, slot, functNum);
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pci_write_config8(pdev, PCI_INTERRUPT_LINE,\
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pIntAtoD[line - 1]);
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readback = pci_read_config8(pdev, PCI_INTERRUPT_LINE);
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printk_debug(" Readback = %d\n", readback);
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// Change to level triggered
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pci_level_irq(pIntAtoD[line - 1]);
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}
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}
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}
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}
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@ -146,12 +146,64 @@ static void ethernet_fixup()
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* in the C code.
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*/
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static void vt8231_pci_enable(struct southbridge_via_vt8231_config *conf) {
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/*
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unsigned long busdevfn = 0x8000;
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if (conf->enable_ide) {
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printk_spew("%s: enabling IDE function\n", __FUNCTION__);
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}
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*/
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}
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/* PIRQ init
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*/
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void pci_assign_irqs(unsigned bus, unsigned slot, const unsigned char pIntAtoD[4]);
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static const unsigned char southbridgeIrqs[4] = { 11, 5, 10, 12 };
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static const unsigned char enetIrqs[4] = { 11, 5, 10, 12 };
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static const unsigned char slotIrqs[4] = { 5, 10, 12, 11 };
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/*
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Our IDSEL mappings are as follows
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PCI slot is AD31 (device 15) (00:14.0)
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Southbridge is AD28 (device 12) (00:11.0)
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*/
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static void pci_routing_fixup(void)
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{
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device_t dev;
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dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
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printk_info("%s: dev is %p\n", __FUNCTION__, dev);
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if (dev) {
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/* initialize PCI interupts - these assignments depend
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on the PCB routing of PINTA-D
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PINTA = IRQ11
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PINTB = IRQ5
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PINTC = IRQ10
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PINTD = IRQ12
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*/
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pci_write_config8(dev, 0x55, 0xb0);
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pci_write_config8(dev, 0x56, 0xa5);
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pci_write_config8(dev, 0x57, 0xc0);
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}
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// Standard southbridge components
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printk_info("setting southbridge\n");
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pci_assign_irqs(0, 0x11, southbridgeIrqs);
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// Ethernet built into southbridge
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printk_info("setting ethernet\n");
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pci_assign_irqs(0, 0x12, enetIrqs);
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// PCI slot
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printk_info("setting pci slot\n");
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pci_assign_irqs(0, 0x14, slotIrqs);
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printk_info("%s: DONE\n", __FUNCTION__);
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}
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static void vt8231_init(struct southbridge_via_vt8231_config *conf)
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{
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unsigned char enables;
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@ -377,6 +429,13 @@ southbridge_init(struct chip *chip, enum chip_pass pass)
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case CONF_PASS_POST_PCI:
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vt8231_init(conf);
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printk_err("FUCK! ROUTING FIXUP!\n");
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pci_routing_fixup();
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break;
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case CONF_PASS_PRE_BOOT:
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printk_err("FUCK! ROUTING FIXUP!\n");
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pci_routing_fixup();
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break;
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default:
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