northbridge/amd/amdfam10: Generate SMBIOS tables for RAM
TEST: Booted ASUS KFSN4-DRE and verified SMBIOS contents via dmidecode utility. Change-Id: Id656f2f6cf5a4ecafa03e150ad91f69107a4fe88 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/9140 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
This commit is contained in:
Timothy Pearson
Aaron Durbin
parent
a73dcbe736
commit
6e523a682f
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@ -28,6 +28,7 @@
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#include <stdlib.h>
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#include <string.h>
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#include <lib.h>
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#include <smbios.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/lapic.h>
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@ -43,6 +44,7 @@
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#include "northbridge.h"
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#include "amdfam10.h"
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#include "ht_config.h"
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#include "chip.h"
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#if CONFIG_HW_MEM_HOLE_SIZEK != 0
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#include <cpu/amd/model_10xxx_rev.h>
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@ -945,6 +947,178 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max)
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return max;
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}
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#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
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static int amdfam10_get_smbios_data16(int* count, int handle, unsigned long *current)
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{
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struct amdmct_memory_info *mem_info;
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mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO);
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if (mem_info == NULL)
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return 0; /* can't find amdmct information in cbmem */
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struct device *dev = get_node_pci(0, 0);
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struct northbridge_amd_amdfam10_config *config = dev->chip_info;
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int node;
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int slot;
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struct smbios_type16 *t = (struct smbios_type16 *)*current;
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int len = sizeof(struct smbios_type16);
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memset(t, 0, sizeof(struct smbios_type16));
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t->type = SMBIOS_PHYS_MEMORY_ARRAY;
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t->handle = handle;
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t->length = len - 2;
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t->location = MEMORY_ARRAY_LOCATION_SYSTEM_BOARD;
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t->use = MEMORY_ARRAY_USE_SYSTEM;
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t->memory_error_correction = MEMORY_ARRAY_ECC_NONE;
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if ((mem_info->ecc_enabled)
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&& (mem_info->mct_stat.GStatus & (1 << GSB_ECCDIMMs))
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&& !(mem_info->mct_stat.GStatus & (1 << GSB_DramECCDis)))
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/* Single-bit ECC enabled */
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t->memory_error_correction = MEMORY_ARRAY_ECC_SINGLE_BIT;
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t->maximum_capacity = config->maximum_memory_capacity / 1024; /* Convert to kilobytes */
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t->memory_error_information_handle = 0xFFFE; /* no error information handle available */
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t->number_of_memory_devices = 0;
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/* Check all nodes for installed DIMMs */
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for (node = 0; node < MAX_NODES_SUPPORTED; node++)
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/* Check all slots for installed DIMMs */
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for (slot = 0; slot < MAX_DIMMS_SUPPORTED; slot++)
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if (mem_info->dct_stat[node].DIMMPresent & (1 << slot))
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/* Found an installed DIMM; increment count */
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t->number_of_memory_devices++;
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*current += len;
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*count += 1;
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return len;
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}
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static uint16_t amdmct_mct_speed_enum_to_mhz(uint8_t speed)
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{
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switch (speed) {
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case 1:
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return 200;
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case 2:
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return 266;
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case 3:
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return 333;
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case 4:
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return 400;
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case 5:
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return 533;
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default:
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return 0;
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}
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}
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static int amdfam10_get_smbios_data17(int* count, int handle, int parent_handle, unsigned long *current)
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{
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struct amdmct_memory_info *mem_info;
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mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO);
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if (mem_info == NULL)
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return 0; /* can't find amdmct information in cbmem */
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int single_len;
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int len = 0;
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int node;
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int slot;
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/* Check all nodes for installed DIMMs */
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for (node = 0; node < MAX_NODES_SUPPORTED; node++) {
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/* Get configured RAM bus speed */
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uint16_t speed;
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speed = amdmct_mct_speed_enum_to_mhz(mem_info->dct_stat[node].Speed);
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/* Get maximum RAM bus speed */
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uint16_t max_speed;
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max_speed = amdmct_mct_speed_enum_to_mhz(mem_info->dct_stat[node].DIMMAutoSpeed);
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/* Check all slots for installed DIMMs */
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for (slot = 0; slot < MAX_DIMMS_SUPPORTED; slot++) {
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if (mem_info->dct_stat[node].DIMMPresent & (1 << slot)) {
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/* Found an installed DIMM; populate tables */
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struct smbios_type17 *t = (struct smbios_type17 *)*current;
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char string_buffer[256];
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/* Initialize structure */
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memset(t, 0, sizeof(struct smbios_type17));
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/* Calculate the total module size in bytes:
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* Primary data width * 2^(#rows) * 2^(#cols) * #banks * #ranks
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*/
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uint8_t width, rows, cols, banks, ranks;
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width = 8;
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rows = mem_info->dct_stat[node].DimmRows[slot];
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cols = mem_info->dct_stat[node].DimmCols[slot];
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ranks = mem_info->dct_stat[node].DimmRanks[slot];
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banks = mem_info->dct_stat[node].DimmBanks[slot];
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uint64_t dimm_size_bytes = width * (1ULL << rows) * (1ULL << cols) * banks * ranks;
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memset(t, 0, sizeof(struct smbios_type17));
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t->type = SMBIOS_MEMORY_DEVICE;
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t->handle = handle;
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t->phys_memory_array_handle = parent_handle;
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t->length = sizeof(struct smbios_type17) - 2;
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if (dimm_size_bytes > 0x800000000) {
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t->size = 0x7FFF;
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t->extended_size = dimm_size_bytes;
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}
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else {
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t->size = dimm_size_bytes / (1024*1024);
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t->size &= (~0x8000); /* size specified in megabytes */
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}
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t->total_width = t->data_width = 64;
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if (mem_info->dct_stat[node].DimmECCPresent & (1 << slot))
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t->total_width += 8;
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t->attributes = 0;
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t->attributes |= ranks & 0xf; /* rank number is stored in the lowest 4 bits of the attributes field */
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t->form_factor = MEMORY_FORMFACTOR_DIMM;
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snprintf(string_buffer, sizeof (string_buffer), "NODE %d DIMM_%s%d", node, (slot & 0x1)?"B":"A", (slot >> 1) + 1);
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t->device_locator = smbios_add_string(t->eos, string_buffer);
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if (IS_ENABLED(CONFIG_DIMM_DDR2))
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t->memory_type = MEMORY_TYPE_DDR2;
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else if (IS_ENABLED(CONFIG_DIMM_DDR3))
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t->memory_type = MEMORY_TYPE_DDR3;
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t->type_detail = MEMORY_TYPE_DETAIL_SYNCHRONOUS;
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if (mem_info->dct_stat[node].DimmRegistered[slot])
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t->type_detail |= MEMORY_TYPE_DETAIL_REGISTERED;
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else
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t->type_detail |= MEMORY_TYPE_DETAIL_UNBUFFERED;
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t->speed = max_speed;
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t->clock_speed = speed;
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smbios_fill_dimm_manufacturer_from_id(mem_info->dct_stat[node].DimmManufacturerID[slot], t);
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t->part_number = smbios_add_string(t->eos, mem_info->dct_stat[node].DimmPartNumber[slot]);
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if (mem_info->dct_stat[node].DimmSerialNumber[slot] == 0) {
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t->serial_number = smbios_add_string(t->eos, "None");
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}
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else {
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snprintf(string_buffer, sizeof (string_buffer), "%08X", mem_info->dct_stat[node].DimmSerialNumber[slot]);
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t->serial_number = smbios_add_string(t->eos, string_buffer);
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}
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t->memory_error_information_handle = 0xFFFE; /* no error information handle available */
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single_len = t->length + smbios_string_table_len(t->eos);
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len += single_len;
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*current += single_len;
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handle++;
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*count += 1;
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}
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}
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}
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return len;
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}
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static int amdfam10_get_smbios_data(device_t dev, int *handle, unsigned long *current)
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{
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int len;
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int count = 0;
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len = amdfam10_get_smbios_data16(&count, *handle, current);
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len += amdfam10_get_smbios_data17(&count, *handle + 1, *handle, current);
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*handle += count;
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return len;
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}
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#endif
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static struct device_operations pci_domain_ops = {
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.read_resources = amdfam10_domain_read_resources,
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.set_resources = amdfam10_domain_set_resources,
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@ -952,6 +1126,9 @@ static struct device_operations pci_domain_ops = {
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.init = NULL,
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.scan_bus = amdfam10_domain_scan_bus,
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.ops_pci_bus = pci_bus_default_ops,
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#if CONFIG_GENERATE_SMBIOS_TABLES
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.get_smbios_data = amdfam10_get_smbios_data,
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#endif
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};
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static void sysconf_init(device_t dev) // first node
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