soc/intel/braswell: Generate microcode binaries from tree

Automatically add microcode binaries from intel-microcode 3rdparty
respository for Braswell processors using Makefile.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Iec57e4d5cd63b9bccc869bf178053f1c99b81b9d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39320
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Michał Żygowski 2020-03-04 18:32:37 +01:00 committed by Patrick Georgi
parent fd2d4730c6
commit 6e61c5ec00
2 changed files with 2 additions and 1 deletions

View File

@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select SUPPORT_CPU_UCODE_IN_CBFS
select MICROCODE_BLOB_NOT_IN_BLOB_REPO
select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
select HAVE_SMI_HANDLER
select NO_FIXED_XIP_ROM_SIZE

View File

@ -68,6 +68,8 @@ CPPFLAGS_common += -I$(call strip_quotes,$(CONFIG_FSP_HEADER_PATH))
CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARDDIR)
cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-4c-*)
ifneq ($(CONFIG_VGA_BIOS_FILE),)
#we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin
BRASWELL_C0_VBIOS= $(subst .bin,_c0.bin,$(call strip_quotes,$(CONFIG_VGA_BIOS_FILE)))