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mb/ocp/deltalake: replace "POST complete" mb code with driver functionality

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Replace the mainboard-specific code for "POST complete" signalling with
devicetree entries for using the newly introduced IPMI driver
functionality.

Test: Boot the machine via the BMC web interface and check that sensors
get read correctly by the IPMI firmware when the payload starts.

Tested successfully.

Tested-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Change-Id: I3441c2a971cfb564b34b3a419beceb949fe295b1
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Michael Niewöhner 2020-12-16 19:56:17 +01:00
parent 6c3ba50a44
commit 6f3c5df55b
2 changed files with 4 additions and 10 deletions
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4
src/mainboard/ocp/deltalake/devicetree.cb
View file

@ -51,6 +51,7 @@ chip soc/intel/xeon_sp/cpx
end end
device domain 0 on device domain 0 on
device gpio 0 alias pch_gpio on end
device pci 00.0 on end # Host bridge device pci 00.0 on end # Host bridge
device pci 04.0 on end # Intel SkyLake-E CBDMA Registers device pci 04.0 on end # Intel SkyLake-E CBDMA Registers
device pci 04.1 on end # Intel SkyLake-E CBDMA Registers device pci 04.1 on end # Intel SkyLake-E CBDMA Registers
@ -86,8 +87,11 @@ chip soc/intel/xeon_sp/cpx
device pci 1f.0 on device pci 1f.0 on
chip drivers/ipmi # BMC KCS chip drivers/ipmi # BMC KCS
device pnp ca2.0 on end device pnp ca2.0 on end
use pch_gpio as gpio_dev
register "bmc_i2c_address" = "0x20" register "bmc_i2c_address" = "0x20"
register "bmc_boot_timeout" = "60" register "bmc_boot_timeout" = "60"
register "post_complete_gpio" = "GPP_B20"
register "post_complete_invert" = "1"
end end
chip drivers/ipmi/ocp # OCP specific IPMI porting chip drivers/ipmi/ocp # OCP specific IPMI porting
device pnp ca2.1 on end device pnp ca2.1 on end

10
src/mainboard/ocp/deltalake/ramstage.c
View file

@ -5,8 +5,6 @@
#include <bootstate.h> #include <bootstate.h>
#include <drivers/ipmi/ipmi_ops.h> #include <drivers/ipmi/ipmi_ops.h>
#include <drivers/ocp/dmi/ocp_dmi.h> #include <drivers/ocp/dmi/ocp_dmi.h>
#include <gpio.h>
#include <soc/lewisburg_pch_gpio_defs.h>
#include <soc/ramstage.h> #include <soc/ramstage.h>
#include <soc/soc_util.h> #include <soc/soc_util.h>
#include <stdio.h> #include <stdio.h>
@ -367,11 +365,3 @@ struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable, .enable_dev = mainboard_enable,
.final = mainboard_final, .final = mainboard_final,
}; };
static void pull_post_complete_pin(void *unused)
{
/* Pull Low post complete pin */
gpio_output(GPP_B20, 0);
}
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, pull_post_complete_pin, NULL);