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amd/mct/ddr3: Rework memory speed to clock value conversion logic 

The existing DRAM clock speed to configuration value logic contained
an error resulting in a theoretical out of bounds read.  While this
would not be hit on real hardware, it was prudent to clean up the
logic to avoid the associated Coverity warning.

Found-by: Coverity Scan #1347353
Change-Id: Ic3de3074f51d52be112a2d6f2d68e35dc881dd2e
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/18073
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Timothy Pearson 2017-01-09 14:27:09 -06:00
parent 8fa624784e
commit 6f9468f019
1 changed files with 6 additions and 6 deletions
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12
src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
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@ -256,11 +256,11 @@ static uint16_t fam15h_mhz_to_memclk_config(uint16_t freq)
/* Compute the index value for the given frequency */ /* Compute the index value for the given frequency */
for (iter = 0; iter <= 0x16; iter++) { for (iter = 0; iter <= 0x16; iter++) {
if (fam15h_freq_tab[iter] == freq) if (fam15h_freq_tab[iter] == freq) {
freq = iter;
break; break;
}
} }
if (fam15h_freq_tab[iter] == freq)
freq = iter;
if (freq == 0) if (freq == 0)
freq = 0x4; freq = 0x4;
@ -274,11 +274,11 @@ static uint16_t fam10h_mhz_to_memclk_config(uint16_t freq)
/* Compute the index value for the given frequency */ /* Compute the index value for the given frequency */
for (iter = 0; iter <= 0x6; iter++) { for (iter = 0; iter <= 0x6; iter++) {
if (fam10h_freq_tab[iter] == freq) if (fam10h_freq_tab[iter] == freq) {
freq = iter;
break; break;
}
} }
if (fam10h_freq_tab[iter] == freq)
freq = iter;
if (freq == 0) if (freq == 0)
freq = 0x3; freq = 0x3;